On Fri, Feb 09, 2018 at 11:34:51AM +0800, Wenyou Yang wrote: > As said in the SAMA5D2 datasheet, the PLLA clock must be divided > by 2 by writing the PLLADIV2 bit in PMC_MCKR, if the ratio between > PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver. > > Signed-off-by: Wenyou Yang <[email protected]>
Applied to u-boot/master, thanks! -- Tom
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