On Tue, Mar 27, 2018 at 04:57:23PM +0300, Stefan Mavrodiev wrote: > U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where > PLL5 is used, with clock rates respectively 600MHz and 768MHz. > Thus there are different phase degree steps - 24 for the kernel and > 30 for u-boot. > > In the kernel driver the phase is set 90 deg for output and 120 for > sample. Dividing by 30 will result values 3 and 4. Those are the > values set in the u-boot driver. > > However, the condition defining delays is wrong. MMC core driver > requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but > phase is set 30 deg for output and 120 deg for sample. > > Apparently this works for most cards. > On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains > about it. Maybe there is other boards with similar problem? > So the fix is to match delays for both u-boot and kernel. > > Signed-off-by: Stefan Mavrodiev <[email protected]>
Acked-by: Maxime Ripard <[email protected]> Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com
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