On Fri, Apr 13, 2018 at 4:50 PM, Christian Gmeiner
> Hi all
> Currently I am trying to get the skylake fsp working with u-boot but I run
> into some issues:
> 1) I see the postcode POST_BIST_FAILURE triggered in car_init
> I am not sure how this could happen and I am not sure from where the BIST
> value comes from. I can see the following call chain
The BIST value is in register eax. See below in start.S
/* Save BIST */
65 movl %eax, %ebp
Then ebp's value will be tested in fsp_car.S
If you get this error, that means your processor does not power up correctly.
> 2) If I remove that check the last post code I see is POST_PRE_MRC
> It looks like fsp_init(..) gets called and hags.
> I am thankful for every hint I could get. In the meantime I will have
> a deeper look
> at the coreboot sources.
Well, there are many possible causes. Please check your FSP UPD
configuration. If you pass something wrong, the FSP won't boot up.
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