Hi Bin, On Wed, Apr 18, 2018 at 07:05:28PM -0600, Bin Meng wrote: > >> > > >> > If there is no ROM image, ucode_base and ucode_size are not initialized > >> > and > >> > the microcode update data from DTB applied by microcode_update_intel() > >> > to the > >> > bootstrap CPU is not used by the multiprocessing code. > >> > >> Correct. If it's not a ROM image, which means U-Boot is probably not > >> the 1st stage bootloader, which means updating microcode is not > >> necessary. So is there any issue with current implementation? > > > > If the 1st stage bootloader is running from the on-chip SRAM, there may be > > not enough space to include the microcode update data. In this case, U-Boot > > is a secondary boot loader but still has to update the microcode. > > Thanks for the information. Correct, if that's the case, then we > should tune our codes to support that. > > But I guess the "1st stage" bootloader is loaded by some on-chip > BOOTROM to the internal SRAM?
Correct. > Is the "1st stage" bootloader running from SRAM the U-Boot SPL? Or > some proprietary implementation? It's usually a proprietary implementation. _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
