Dear Naveen Krishna Ch,
On 9 February 2010 18:38, Naveen Krishna Ch <ch.nav...@samsung.com> wrote:
> From: Naveen Krishna CH <ch.nav...@samsung.com>
>
> Nand Flash, Ethernet, other features might need to configure the
> SROMC registers accordingly.
> The config_sromc() functions helps with this.
>
> Signed-off-by: Naveen Krishna Ch <ch.naveen <at> samsung.com>
please fix ur e-mail address.
> ---
> cpu/arm_cortexa8/s5pc1xx/Makefile | 1 +
> cpu/arm_cortexa8/s5pc1xx/sromc.c | 49
> ++++++++++++++++++++++++++++++++++++
> include/asm-arm/arch-s5pc1xx/mem.h | 3 ++
> 3 files changed, 53 insertions(+), 0 deletions(-)
> create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c
>
> diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile
> b/cpu/arm_cortexa8/s5pc1xx/Makefile
> index 4f922e6..0a6a9b4 100644
> --- a/cpu/arm_cortexa8/s5pc1xx/Makefile
> +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
> @@ -34,6 +34,7 @@ SOBJS += reset.o
> COBJS += clock.o
> COBJS += cpu_info.o
> COBJS += timer.o
> +COBJS += sromc.o
>
> SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
> diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c
> b/cpu/arm_cortexa8/s5pc1xx/sromc.c
> new file mode 100644
> index 0000000..96ca9e0
> --- /dev/null
> +++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c
> @@ -0,0 +1,49 @@
> +/*
> + * Copyright (C) 2010 Samsung Electronics
> + * Naveen Krishna Ch <ch.nav...@samsung.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/mem.h>
> +
> +/*
> + * config_sromc() - select the proper SROMC Bank and configure the
> + * band width control and bank control registers
> + * srom_bank - SROM Bank 0 to 5
> + * smc_bw_conf - SMC Band witdh reg configuration value
> + * smc_bc_conf - SMC Bank Control reg configuration value
> + */
> +void config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
> +{
> + u32 tmp;
> + struct s5pc1xx_sromc *const srom =
> + (struct s5pc1xx_sromc *)S5PC100_SROMC_BASE;
Please adds support S5PC110 together.
> +
> + /* Configure SMC_BW register to handle proper SROMC bank */
> + tmp = srom->smc_bw;
> + tmp &= ~(0xF << (srom_bank * 4));
> + tmp |= smc_bw_conf;
> + srom->smc_bw = tmp;
> +
> + /* Configure SMC_BC register */
> + srom->smc_bc[srom_bank] = smc_bc_conf;
> +}
> diff --git a/include/asm-arm/arch-s5pc1xx/mem.h
> b/include/asm-arm/arch-s5pc1xx/mem.h
> index 66272ff..99b2d2e 100644
> --- a/include/asm-arm/arch-s5pc1xx/mem.h
> +++ b/include/asm-arm/arch-s5pc1xx/mem.h
> @@ -52,4 +52,7 @@ struct s5pc1xx_sromc {
> };
> #endif /* __ASSEMBLY__ */
>
> +/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
> +void config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf);
> +
> #endif /* __ASM_ARCH_MEM_H_ */
> --
> 1.6.6
>
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>
Thanks
Minkyu Kang
--
from. prom.
www.promsoft.net
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