On Sun, May 13, 2018 at 4:25 AM, Marek Vasut <[email protected]> wrote: > The DT bindings for the Arria10 clock init have changed, add another > compatible to make them work with U-Boot until a proper clock driver > gets written. > > Signed-off-by: Marek Vasut <[email protected]> > Cc: Tom Rini <[email protected]> > Cc: Chin Liang See <[email protected]> > Cc: Dinh Nguyen <[email protected]> > --- > include/fdtdec.h | 1 + > lib/fdtdec.c | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/include/fdtdec.h b/include/fdtdec.h > index 5456a17d1a..c15b2a04a7 100644 > --- a/include/fdtdec.h > +++ b/include/fdtdec.h > @@ -160,6 +160,7 @@ enum fdt_compat_id { > COMPAT_ALTERA_SOCFPGA_F2SDR2, /* SoCFPGA fpga2SDRAM2 bridge > */ > COMPAT_ALTERA_SOCFPGA_FPGA0, /* SOCFPGA FPGA manager */ > COMPAT_ALTERA_SOCFPGA_NOC, /* SOCFPGA Arria 10 NOC */ > + COMPAT_ALTERA_SOCFPGA_CLK_INIT, /* SOCFPGA Arria 10 clk init > */ > > COMPAT_COUNT, > }; > diff --git a/lib/fdtdec.c b/lib/fdtdec.c > index 69bf12623e..f4e8dbf699 100644 > --- a/lib/fdtdec.c > +++ b/lib/fdtdec.c > @@ -72,6 +72,7 @@ static const char * const compat_names[COMPAT_COUNT] = { > COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), > COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"), > COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"), > + COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init") > }; > > const char *fdtdec_get_compatible(enum fdt_compat_id id) > -- > 2.16.2
Reviewed-by: Ley Foon Tan <[email protected]> _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
