On Sun, May 13, 2018 at 4:30 AM, Marek Vasut <ma...@denx.de> wrote: > Sort the Makefile entries, no functional change. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Chin Liang See <chin.liang....@intel.com> > Cc: Dinh Nguyen <dingu...@kernel.org> > --- > arch/arm/dts/Makefile | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index f94940a7dd..b29ecb0060 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -182,20 +182,20 @@ dtb-$(CONFIG_TI816X) += dm8168-evm.dtb > dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb > > dtb-$(CONFIG_ARCH_SOCFPGA) += \ > - socfpga_arria10_socdk_sdmmc.dtb \ > socfpga_arria5_socdk.dtb \ > + socfpga_arria10_socdk_sdmmc.dtb \ > socfpga_cyclone5_is1.dtb \ > socfpga_cyclone5_mcvevk.dtb \ > socfpga_cyclone5_socdk.dtb \ > socfpga_cyclone5_dbm_soc1.dtb \ > - socfpga_cyclone5_de0_nano_soc.dtb \ > + socfpga_cyclone5_de0_nano_soc.dtb \ > socfpga_cyclone5_de1_soc.dtb \ > socfpga_cyclone5_de10_nano.dtb \ > socfpga_cyclone5_sockit.dtb \ > socfpga_cyclone5_socrates.dtb \ > socfpga_cyclone5_sr1500.dtb \ > - socfpga_stratix10_socdk.dtb \ > - socfpga_cyclone5_vining_fpga.dtb > + socfpga_cyclone5_vining_fpga.dtb \ > + socfpga_stratix10_socdk.dtb > > dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \ > dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb > -- > 2.16.2 >
Reviewed-by: Ley Foon Tan <ley.foon....@intel.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot