The SPL can also parse the DRAM configuration node to figure out the memory layout, make sure it is available.
Signed-off-by: Marek Vasut <[email protected]> Cc: Chin Liang See <[email protected]> Cc: Dinh Nguyen <[email protected]> --- arch/arm/dts/socfpga_arria10_socdk.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi b/arch/arm/dts/socfpga_arria10_socdk.dtsi index d7616dd1c5..3f59f02577 100644 --- a/arch/arm/dts/socfpga_arria10_socdk.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi @@ -34,6 +34,7 @@ name = "memory"; device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB */ + u-boot,dm-pre-reloc; }; a10leds { -- 2.17.0 _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
