Commit 2407183f98cf130b008125ef1718ccf89a192998 breaks
the qemu-x86 and edison builds.
Move ucode_base and ucode_size into common startup code,
except for configs with FSP.
Signed-off-by: Ivan Gorinov <ivan.gori...@intel.com>
---
arch/x86/cpu/intel_common/car.S | 10 ----------
arch/x86/cpu/start.S | 10 ++++++++++
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/x86/cpu/intel_common/car.S b/arch/x86/cpu/intel_common/car.S
index 52a77bb..7295e0f 100644
--- a/arch/x86/cpu/intel_common/car.S
+++ b/arch/x86/cpu/intel_common/car.S
@@ -232,13 +232,3 @@ mtrr_table:
.word 0x20C, 0x20D, 0x20E, 0x20F
.word 0x210, 0x211, 0x212, 0x213
mtrr_table_end:
-
- .align 4
-_dt_ucode_base_size:
- /* These next two fields are filled in by ifdtool */
-.globl ucode_base
-ucode_base: /* Declared in microcode.h */
- .long 0 /* microcode base */
-.globl ucode_size
-ucode_size: /* Declared in microcode.h */
- .long 0 /* microcode size */
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index e4e997e..1fdd82a 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -291,3 +291,13 @@ gdt_rom2:
.byte 0xcf /* flags + limit_high */
.byte 0x00 /* base_high */
#endif
+
+#ifndef CONFIG_HAVE_FSP
+ .align 4
+.globl ucode_base
+ucode_base: /* Declared in microcode.h */
+ .long 0 /* microcode base */
+.globl ucode_size
+ucode_size: /* Declared in microcode.h */
+ .long 0 /* microcode size */
+#endif
--
2.7.4
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