On Thu, Jun 28, 2018 at 2:06 AM, Lothar Felten <lothar.fel...@gmail.com> wrote: > Add clock control entries for the gigabit interface of the Allwinner > R40/V40 CPU > > Acked-by: Maxime Ripard <maxime.rip...@bootlin.com> > Reviewed-by: Joe Hershberger <joe.hershber...@ni.com> > Signed-off-by: Lothar Felten <lothar.fel...@gmail.com> > > --- > Changelog: > new in v2 > v2->v3->4->v5: none > ---
Except 6/6 about Maxime comment. This series, Reviewed-by: Jagan Teki <ja...@openedev.com> and tested on M2-Ultra with board MAC => printenv ethaddr ethaddr=02:53:f1:d5:73:b3 Tested-by: Jagan Teki <ja...@openedev.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
