On 07/09/2018 08:03 PM, Dinh Nguyen wrote:
>
>
> On 05/31/2018 03:08 AM, tien.fong.c...@intel.com wrote:
>> From: Tien Fong Chee <tien.fong.c...@intel.com>
>>
>> Update pdma properties for Stratix 10
>>
>> Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
>> ---
>> arch/arm/dts/socfpga_stratix10.dtsi | 20 ++++++++++++++++++++
>> 1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm/dts/socfpga_stratix10.dtsi
>> b/arch/arm/dts/socfpga_stratix10.dtsi
>> index ccd3f32..311ba09 100644
>> --- a/arch/arm/dts/socfpga_stratix10.dtsi
>> +++ b/arch/arm/dts/socfpga_stratix10.dtsi
>> @@ -82,6 +82,26 @@
>> ranges = <0 0 0 0xffffffff>;
>> u-boot,dm-pre-reloc;
>>
>> + amba {
>> + u-boot,dm-pre-reloc;
>> + compatible = "arm,amba-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + pdma: pdma@ffda0000 {
>> + u-boot,dm-pre-reloc;
>> + compatible = "arm,pl330", "arm,dma330";
>
> I think you got "arm,dma330" binding wrong. I don't see any binding with
> that name.
I think the whole idea of using pl330 to scrub ECC DRAM is wrong. It
adds massive amount of code while a CPU can do the same and faster, cfr
arria10.
--
Best regards,
Marek Vasut
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