Implement UART resets for all relevant Allwinner SoC clock drivers via reset map descriptor table.
Signed-off-by: Jagan Teki <[email protected]> --- drivers/clk/sunxi/clk_a23.c | 6 ++++++ drivers/clk/sunxi/clk_a31.c | 7 +++++++ drivers/clk/sunxi/clk_a64.c | 6 ++++++ drivers/clk/sunxi/clk_a83t.c | 6 ++++++ drivers/clk/sunxi/clk_h3.c | 5 +++++ drivers/clk/sunxi/clk_r40.c | 9 +++++++++ drivers/clk/sunxi/clk_v3s.c | 4 ++++ 7 files changed, 43 insertions(+) diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c index 331c79af81..268148002b 100644 --- a/drivers/clk/sunxi/clk_a23.c +++ b/drivers/clk/sunxi/clk_a23.c @@ -50,6 +50,12 @@ static struct ccu_reset_map a23_resets[] = { [RST_BUS_OTG] = { 0x2c0, BIT(24) }, [RST_BUS_EHCI] = { 0x2c0, BIT(26) }, [RST_BUS_OHCI] = { 0x2c0, BIT(29) }, + + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, + [RST_BUS_UART3] = { 0x2d8, BIT(19) }, + [RST_BUS_UART4] = { 0x2d8, BIT(20) }, }; static const struct ccu_desc sun8i_a23_ccu_desc = { diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c index 40803a1d64..288979a18f 100644 --- a/drivers/clk/sunxi/clk_a31.c +++ b/drivers/clk/sunxi/clk_a31.c @@ -72,6 +72,13 @@ static struct ccu_reset_map a31_resets[] = { [RST_AHB1_OHCI0] = { 0x2c0, BIT(29) }, [RST_AHB1_OHCI1] = { 0x2c0, BIT(30) }, [RST_AHB1_OHCI2] = { 0x2c0, BIT(31) }, + + [RST_APB2_UART0] = { 0x2d8, BIT(16) }, + [RST_APB2_UART1] = { 0x2d8, BIT(17) }, + [RST_APB2_UART2] = { 0x2d8, BIT(18) }, + [RST_APB2_UART3] = { 0x2d8, BIT(19) }, + [RST_APB2_UART4] = { 0x2d8, BIT(20) }, + [RST_APB2_UART5] = { 0x2d8, BIT(21) }, }; static const struct ccu_desc sun6i_a31_ccu_desc = { diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index 13b506f983..344cfb59aa 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -60,6 +60,12 @@ static struct ccu_reset_map a64_resets[] = { [RST_BUS_EHCI1] = { 0x2c0, BIT(25) }, [RST_BUS_OHCI0] = { 0x2c0, BIT(28) }, [RST_BUS_OHCI1] = { 0x2c0, BIT(29) }, + + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, + [RST_BUS_UART3] = { 0x2d8, BIT(19) }, + [RST_BUS_UART4] = { 0x2d8, BIT(20) }, }; static const struct ccu_desc sun50i_a64_ccu_desc = { diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c index 5c1235fa7b..cf9455da97 100644 --- a/drivers/clk/sunxi/clk_a83t.c +++ b/drivers/clk/sunxi/clk_a83t.c @@ -50,6 +50,12 @@ static struct ccu_reset_map a83t_resets[] = { [RST_BUS_EHCI0] = { 0x2c0, BIT(26) }, [RST_BUS_EHCI1] = { 0x2c0, BIT(27) }, [RST_BUS_OHCI0] = { 0x2c0, BIT(29) }, + + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, + [RST_BUS_UART3] = { 0x2d8, BIT(19) }, + [RST_BUS_UART4] = { 0x2d8, BIT(20) }, }; static const struct ccu_desc sun8i_a83t_ccu_desc = { diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c index b132ae0a0d..15d933a6c5 100644 --- a/drivers/clk/sunxi/clk_h3.c +++ b/drivers/clk/sunxi/clk_h3.c @@ -70,6 +70,11 @@ static struct ccu_reset_map h3_resets[] = { [RST_BUS_OHCI1] = { 0x2c0, BIT(29) }, [RST_BUS_OHCI2] = { 0x2c0, BIT(30) }, [RST_BUS_OHCI3] = { 0x2c0, BIT(31) }, + + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, + [RST_BUS_UART3] = { 0x2d8, BIT(19) }, }; static const struct ccu_desc sun8i_h3_ccu_desc = { diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c index 1e5b1d10f7..ee699d26ee 100644 --- a/drivers/clk/sunxi/clk_r40.c +++ b/drivers/clk/sunxi/clk_r40.c @@ -63,6 +63,15 @@ static struct ccu_reset_map r40_resets[] = { [RST_BUS_OHCI0] = { 0x2c0, BIT(29) }, [RST_BUS_OHCI1] = { 0x2c0, BIT(30) }, [RST_BUS_OHCI2] = { 0x2c0, BIT(31) }, + + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, + [RST_BUS_UART3] = { 0x2d8, BIT(19) }, + [RST_BUS_UART4] = { 0x2d8, BIT(20) }, + [RST_BUS_UART5] = { 0x2d8, BIT(21) }, + [RST_BUS_UART6] = { 0x2d8, BIT(22) }, + [RST_BUS_UART7] = { 0x2d8, BIT(23) }, }; static const struct ccu_desc sun8i_r40_ccu_desc = { diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index c6e57147ee..87ca0350d8 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -40,6 +40,10 @@ static struct ccu_reset_map v3s_resets[] = { [RST_BUS_MMC2] = { 0x2c0, BIT(10) }, [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, [RST_BUS_OTG] = { 0x2c0, BIT(24) }, + + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, }; static const struct ccu_desc sun8i_v3s_ccu_desc = { -- 2.18.0.321.gffc6fa0e3 _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
