The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI NOR).

The mt7628a.dtsi file is imported from Linux v4.17.

This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.

Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---
v2:
- Kconfig entries added with this patch now

 arch/mips/dts/linkit-smart-7688.dts       |  46 ++++++++
 arch/mips/dts/mt7628a.dtsi                | 135 ++++++++++++++++++++++
 arch/mips/mach-mt7620/Kconfig             |  13 +++
 board/seeed/linkit-smart-7688/Kconfig     |  12 ++
 board/seeed/linkit-smart-7688/MAINTAINERS |   8 ++
 board/seeed/linkit-smart-7688/Makefile    |   3 +
 board/seeed/linkit-smart-7688/board.c     |  22 ++++
 configs/linkit-smart-7688-ram_defconfig   |  58 ++++++++++
 configs/linkit-smart-7688_defconfig       |  62 ++++++++++
 include/configs/linkit-smart-7688.h       |  52 +++++++++
 10 files changed, 411 insertions(+)
 create mode 100644 arch/mips/dts/linkit-smart-7688.dts
 create mode 100644 arch/mips/dts/mt7628a.dtsi
 create mode 100644 board/seeed/linkit-smart-7688/Kconfig
 create mode 100644 board/seeed/linkit-smart-7688/MAINTAINERS
 create mode 100644 board/seeed/linkit-smart-7688/Makefile
 create mode 100644 board/seeed/linkit-smart-7688/board.c
 create mode 100644 configs/linkit-smart-7688-ram_defconfig
 create mode 100644 configs/linkit-smart-7688_defconfig
 create mode 100644 include/configs/linkit-smart-7688.h

diff --git a/arch/mips/dts/linkit-smart-7688.dts 
b/arch/mips/dts/linkit-smart-7688.dts
new file mode 100644
index 0000000000..df4bf907c6
--- /dev/null
+++ b/arch/mips/dts/linkit-smart-7688.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Stefan Roese <s...@denx.de>
+ */
+
+/dts-v1/;
+
+#include "mt7628a.dtsi"
+
+/ {
+       compatible = "seeed,linkit-smart-7688", "ralink,mt7628a-soc";
+       model = "LinkIt-Smart-7688";
+
+       aliases {
+               serial0 = &uart2;
+               spi0 = &spi0;
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x08000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,57600";
+               stdout-path = &uart2;
+       };
+};
+
+&uart2 {
+       status = "okay";
+       clock-frequency = <40000000>;
+};
+
+&spi0 {
+       status = "okay";
+       num-cs = <2>;
+
+       spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash", "jedec,spi-nor";
+               spi-max-frequency = <25000000>;
+               reg = <0>;
+       };
+};
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
new file mode 100644
index 0000000000..d00f528e1f
--- /dev/null
+++ b/arch/mips/dts/mt7628a.dtsi
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       compatible = "ralink,mt7628a-soc";
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       compatible = "mti,mips24KEc";
+                       device_type = "cpu";
+                       reg = <0>;
+               };
+       };
+
+       resetc: reset-controller {
+               compatible = "ralink,rt2880-reset";
+               #reset-cells = <1>;
+       };
+
+       cpuintc: interrupt-controller {
+               #address-cells = <0>;
+               #interrupt-cells = <1>;
+               interrupt-controller;
+               compatible = "mti,cpu-interrupt-controller";
+       };
+
+       palmbus@10000000 {
+               compatible = "palmbus", "simple-bus";
+               reg = <0x10000000 0x200000>;
+               ranges = <0x0 0x10000000 0x1FFFFF>;
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               sysc: system-controller@0 {
+                       compatible = "ralink,mt7620a-sysc", "syscon";
+                       reg = <0x0 0x100>;
+               };
+
+               intc: interrupt-controller@200 {
+                       compatible = "ralink,rt2880-intc";
+                       reg = <0x200 0x100>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+
+                       resets = <&resetc 9>;
+                       reset-names = "intc";
+
+                       interrupt-parent = <&cpuintc>;
+                       interrupts = <2>;
+
+                       ralink,intc-registers = <0x9c 0xa0
+                                                0x6c 0xa4
+                                                0x80 0x78>;
+               };
+
+               memory-controller@300 {
+                       compatible = "ralink,mt7620a-memc";
+                       reg = <0x300 0x100>;
+               };
+
+               spi0: spi@b00 {
+                       compatible = "ralink,mt7621-spi";
+                       reg = <0xb00 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               uart0: uartlite@c00 {
+                       compatible = "ns16550a";
+                       reg = <0xc00 0x100>;
+
+                       resets = <&resetc 12>;
+                       reset-names = "uart0";
+
+                       interrupt-parent = <&intc>;
+                       interrupts = <20>;
+
+                       reg-shift = <2>;
+               };
+
+               uart1: uart1@d00 {
+                       compatible = "ns16550a";
+                       reg = <0xd00 0x100>;
+
+                       resets = <&resetc 19>;
+                       reset-names = "uart1";
+
+                       interrupt-parent = <&intc>;
+                       interrupts = <21>;
+
+                       reg-shift = <2>;
+               };
+
+               uart2: uart2@e00 {
+                       compatible = "ns16550a";
+                       reg = <0xe00 0x100>;
+
+                       resets = <&resetc 20>;
+                       reset-names = "uart2";
+
+                       interrupt-parent = <&intc>;
+                       interrupts = <22>;
+
+                       reg-shift = <2>;
+               };
+       };
+
+       usb_phy: usb-phy@10120000 {
+               compatible = "mediatek,mt7628-usbphy";
+               reg = <0x10120000 0x1000>;
+
+               #phy-cells = <0>;
+
+               ralink,sysctl = <&sysc>;
+               resets = <&resetc 22 &resetc 25>;
+               reset-names = "host", "device";
+       };
+
+       ehci@101c0000 {
+               compatible = "generic-ehci";
+               reg = <0x101c0000 0x1000>;
+
+               phys = <&usb_phy>;
+               phy-names = "usb";
+
+               interrupt-parent = <&intc>;
+               interrupts = <18>;
+       };
+};
diff --git a/arch/mips/mach-mt7620/Kconfig b/arch/mips/mach-mt7620/Kconfig
index 396fbd0141..ef1211d172 100644
--- a/arch/mips/mach-mt7620/Kconfig
+++ b/arch/mips/mach-mt7620/Kconfig
@@ -21,6 +21,17 @@ endchoice
 choice
        prompt "Board select"
 
+config BOARD_LINKIT_SMART_7688
+       bool "LinkIt Smart 7688"
+       depends on SOC_MT7620
+       select SUPPORTS_BOOT_RAM
+       help
+         Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM
+         and 32 MiB of flash (SPI).
+         Between its different peripherals there's an integrated switch with 4
+         ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
+         a MT7688 (PCIe).
+
 endchoice
 
 choice
@@ -110,4 +121,6 @@ endchoice
 config SUPPORTS_BOOT_RAM
        bool
 
+source "board/seeed/linkit-smart-7688/Kconfig"
+
 endmenu
diff --git a/board/seeed/linkit-smart-7688/Kconfig 
b/board/seeed/linkit-smart-7688/Kconfig
new file mode 100644
index 0000000000..a9d63285c3
--- /dev/null
+++ b/board/seeed/linkit-smart-7688/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_LINKIT_SMART_7688
+
+config SYS_BOARD
+       default "linkit-smart-7688"
+
+config SYS_VENDOR
+       default "seeed"
+
+config SYS_CONFIG_NAME
+       default "linkit-smart-7688"
+
+endif
diff --git a/board/seeed/linkit-smart-7688/MAINTAINERS 
b/board/seeed/linkit-smart-7688/MAINTAINERS
new file mode 100644
index 0000000000..c3bbad4231
--- /dev/null
+++ b/board/seeed/linkit-smart-7688/MAINTAINERS
@@ -0,0 +1,8 @@
+LINKIT_SMART_7688 BOARD
+M:     Stefan Roese <s...@denx.de>
+S:     Maintained
+F:     board/seeed/linkit-smart-7688
+F:     include/configs/linkit-smart-7688.h
+F:     configs/linkit-smart-7688_defconfig
+F:     configs/linkit-smart-7688_ram_defconfig
+F:     arch/mips/dts/linkit-smart-7688.dts
diff --git a/board/seeed/linkit-smart-7688/Makefile 
b/board/seeed/linkit-smart-7688/Makefile
new file mode 100644
index 0000000000..70cd7a8e56
--- /dev/null
+++ b/board/seeed/linkit-smart-7688/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += board.o
diff --git a/board/seeed/linkit-smart-7688/board.c 
b/board/seeed/linkit-smart-7688/board.c
new file mode 100644
index 0000000000..fbe94cc292
--- /dev/null
+++ b/board/seeed/linkit-smart-7688/board.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Stefan Roese <s...@denx.de>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define MT76XX_GPIO1_MODE      0xb0000060
+
+void board_debug_uart_init(void)
+{
+       /* Select UART2 mode instead of GPIO mode (default) */
+       clrbits_le32((void __iomem *)MT76XX_GPIO1_MODE, GENMASK(27, 26));
+}
+
+int board_early_init_f(void)
+{
+       board_debug_uart_init();
+
+       return 0;
+}
diff --git a/configs/linkit-smart-7688-ram_defconfig 
b/configs/linkit-smart-7688-ram_defconfig
new file mode 100644
index 0000000000..4b269f459b
--- /dev/null
+++ b/configs/linkit-smart-7688-ram_defconfig
@@ -0,0 +1,58 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0x10000e00
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_ARCH_MT7620=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
+CONFIG_DEBUG_UART=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NET is not set
+CONFIG_CMD_TIME=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_CLK=y
+CONFIG_CPU=y
+CONFIG_DM_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_4BYTE_MODE_ONLY=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=57600
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_MT76XX_SPI=y
+CONFIG_SYSRESET_SYSCON=y
diff --git a/configs/linkit-smart-7688_defconfig 
b/configs/linkit-smart-7688_defconfig
new file mode 100644
index 0000000000..cdb8c06517
--- /dev/null
+++ b/configs/linkit-smart-7688_defconfig
@@ -0,0 +1,62 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0xbc000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0x10000e00
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_ARCH_MT7620=y
+CONFIG_BOOT_ROM=y
+CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y
+CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
+CONFIG_DEBUG_UART=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NET is not set
+CONFIG_CMD_TIME=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_CLK=y
+CONFIG_CPU=y
+CONFIG_DM_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_4BYTE_MODE_ONLY=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=57600
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_MT76XX_SPI=y
+CONFIG_SYSRESET_SYSCON=y
diff --git a/include/configs/linkit-smart-7688.h 
b/include/configs/linkit-smart-7688.h
new file mode 100644
index 0000000000..be6cffee35
--- /dev/null
+++ b/include/configs/linkit-smart-7688.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Stefan Roese <s...@denx.de>
+ */
+
+#ifndef __CONFIG_LINKIT_SMART_7688_H
+#define __CONFIG_LINKIT_SMART_7688_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ     200000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_SYS_SDRAM_BASE          0x80000000
+
+#define CONFIG_SYS_LOAD_ADDR           CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#define CONFIG_SYS_INIT_SP_OFFSET      0x400000
+
+#ifdef CONFIG_BOOT_RAM
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+/* UART */
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, \
+                                         230400, 500000, 1500000 }
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START       0x80100000
+#define CONFIG_SYS_MEMTEST_END         0x80400000
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS             64
+#define CONFIG_SYS_MALLOC_LEN          (1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN      (128 * 1024)
+#define CONFIG_SYS_CBSIZE              512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE
+
+/* Environment settings */
+#define CONFIG_ENV_OFFSET              0x40000
+#define CONFIG_ENV_SIZE                        (16 << 10)
+#define CONFIG_ENV_SECT_SIZE           (64 << 10)
+
+/*
+ * Environment is right behind U-Boot in flash. Make sure U-Boot
+ * doesn't grow into the environment area.
+ */
+#define CONFIG_BOARD_SIZE_LIMIT                CONFIG_ENV_OFFSET
+
+#endif /* __CONFIG_LINKIT_SMART_7688_H */
-- 
2.18.0

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