On Wed, 18 Apr 2018, Kever Yang wrote:
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track the boot time.
Signed-off-by: Kever Yang <[email protected]>
---
arch/arm/mach-rockchip/Makefile | 2 +-
arch/arm/mach-rockchip/rk3036-board-spl.c | 19 +++++++++++++++++--
include/configs/rk3036_common.h | 6 +++---
3 files changed, 21 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index c1eeefb..02aa58a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -40,7 +40,7 @@ endif
obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
ifndef CONFIG_ARM64
-ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X),)
+ifeq
($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036),)
Same as for the previous patch.
Now it has become apparent, that this list is growing...
obj-y += rk_timer.o
endif
endif
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c
b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 550e3a1..4b4016b 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -11,7 +11,6 @@
#include <asm/arch/grf_rk3036.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sdram_rk3036.h>
-#include <asm/arch/timer.h>
#include <asm/arch/uart.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -20,6 +19,17 @@ DECLARE_GLOBAL_DATA_PTR;
#define DEBUG_UART_BASE 0x20068000
Please make this a const uint32_t * ... or even better: use a pointer to a
structure representing the peripheral's register layout.
+void rockchip_stimer_init(void)
+{
+ asm volatile("mcr p15, 0, %0, c14, c0, 0"
+ : : "r"(COUNTER_FREQUENCY));
+
+ writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
Unless we really want a 0, we should clrbits the specific bits involved
via symbolic constants.
+ writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+ writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+ writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
This should be a symbolic 'enable' bit that gets written.
I'd prefer a setbits on this, as we only want a single bit.
Once again (I had this in the comments on the first revision a few weeks
back already): the STIMER_BASE is not user-configurable.
+}
+
void board_init_f(ulong dummy)
{
#ifdef EARLY_DEBUG
@@ -36,7 +46,12 @@ void board_init_f(ulong dummy)
GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
debug_uart_init();
#endif
- rockchip_timer_init();
+
+ /* Init secure timer */
+ rockchip_stimer_init();
+ /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+ timer_init();
+
sdram_init();
/* return to maskrom */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f39a272..7d83f81 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -14,9 +14,9 @@
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
+#define COUNTER_FREQUENCY 24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_MEM32
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