The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).

Signed-off-by: Cédric Le Goater <[email protected]>
---
 Changes since v1:
 
 - introduced a udevice_id .data model
 - dropped is_aspeed bool
 - dropped MDIO interface setting for Aspeed SoC. The default is
   correct.
 - removed the clcoks which are now handled automatically in the
   ftgmac100 driver

 drivers/net/ftgmac100.c       | 29 +++++++++++++++++++++++++----
 configs/evb-ast2500_defconfig |  8 ++++++++
 2 files changed, 33 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 4596385d68cf..e48e30c54269 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -42,6 +42,14 @@
  */
 #define MDC_CYCTHR                     0x34
 
+/*
+ * ftgmac100 model variants
+ */
+enum ftgmac100_model {
+       FTGMAC100_MODEL_FARADAY,
+       FTGMAC100_MODEL_ASPEED,
+};
+
 /**
  * struct ftgmac100_data - private data for the FTGMAC100 driver
  *
@@ -72,6 +80,10 @@ struct ftgmac100_data {
        u32 max_speed;
 
        struct clk_bulk clks;
+
+       /* End of TX/TX ring buffer bits. Depend on model */
+       u32 rxdes0_edorr_mask;
+       u32 txdes0_edotr_mask;
 };
 
 static int ftgmac100_mdio_read(struct mii_dev *bus, int phy_addr, int dev_addr,
@@ -270,7 +282,7 @@ static int ftgmac100_start(struct udevice *dev)
                priv->txdes[i].txdes3 = 0;
                priv->txdes[i].txdes0 = 0;
        }
-       priv->txdes[PKTBUFSTX - 1].txdes0 = FTGMAC100_TXDES0_EDOTR;
+       priv->txdes[PKTBUFSTX - 1].txdes0 = priv->txdes0_edotr_mask;
 
        start = (ulong)&priv->txdes[0];
        end = start + roundup(sizeof(priv->txdes), ARCH_DMA_MINALIGN);
@@ -280,7 +292,7 @@ static int ftgmac100_start(struct udevice *dev)
                priv->rxdes[i].rxdes3 = (unsigned int)net_rx_packets[i];
                priv->rxdes[i].rxdes0 = 0;
        }
-       priv->rxdes[PKTBUFSRX - 1].rxdes0 = FTGMAC100_RXDES0_EDORR;
+       priv->rxdes[PKTBUFSRX - 1].rxdes0 = priv->rxdes0_edorr_mask;
 
        start = (ulong)&priv->rxdes[0];
        end = start + roundup(sizeof(priv->rxdes), ARCH_DMA_MINALIGN);
@@ -411,7 +423,7 @@ static int ftgmac100_send(struct udevice *dev, void 
*packet, int length)
        flush_dcache_range(data_start, data_end);
 
        /* Only one segment on TXBUF */
-       curr_des->txdes0 &= FTGMAC100_TXDES0_EDOTR;
+       curr_des->txdes0 &= priv->txdes0_edotr_mask;
        curr_des->txdes0 |= FTGMAC100_TXDES0_FTS |
                FTGMAC100_TXDES0_LTS |
                FTGMAC100_TXDES0_TXBUF_SIZE(length) |
@@ -471,6 +483,14 @@ static int ftgmac100_ofdata_to_platdata(struct udevice 
*dev)
 
        pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0);
 
+       if (dev_get_driver_data(dev) == FTGMAC100_MODEL_ASPEED) {
+               priv->rxdes0_edorr_mask = BIT(30);
+               priv->txdes0_edotr_mask = BIT(30);
+       } else {
+               priv->rxdes0_edorr_mask = BIT(15);
+               priv->txdes0_edotr_mask = BIT(15);
+       }
+
        return clk_get_bulk(dev, &priv->clks);
 }
 
@@ -530,7 +550,8 @@ static const struct eth_ops ftgmac100_ops = {
 };
 
 static const struct udevice_id ftgmac100_ids[] = {
-       { .compatible = "faraday,ftgmac100" },
+       { .compatible = "faraday,ftgmac100",  .data = FTGMAC100_MODEL_FARADAY },
+       { .compatible = "aspeed,ast2500-mac", .data = FTGMAC100_MODEL_ASPEED  },
        { }
 };
 
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 88230f4a12db..32581f5ada54 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -25,3 +25,11 @@ CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_TIMER=y
 CONFIG_WDT=y
+CONFIG_NETDEVICES=y
+CONFIG_PHY=y
+CONFIG_DM_ETH=y
+CONFIG_FTGMAC100=y
+CONFIG_PHY_REALTEK=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
-- 
2.17.1

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