On 05/10/2018 12:57, Peng Fan wrote:
> Hi Stefano,
>
>> -----Original Message-----
>> From: Stefano Babic [mailto:sba...@denx.de]
>> Sent: 2018年10月5日 18:54
>> To: Peng Fan <peng....@nxp.com>; sba...@denx.de; ag...@denx.de
>> Cc: u-boot@lists.denx.de; Fabio Estevam <fabio.este...@nxp.com>
>> Subject: Re: [PATCH V5 32/32] imx: add i.MX8QXP MEK board support
>>
>> Hi Peng,
>>
>> I am fine with most patches of this series.
>
> Thanks.
>
> Anyway, I see that to build the image
>> you are using a "fork" of mkimage...
>
> Yes. I am developing the i.MX8X mkimage support in U-Boot.
> I think It could catch up next release.
ok - thanks !
Best regards,
Stefano
>
> Thanks,
> Peng.
>
>>
>>
>> On 26/09/2018 15:52, Peng Fan wrote:
>>> Add i.MX8QXP MEK board support
>>> Enabled pinctrl/clk/power domain/mmc/i2c driver.
>>> Added README file.
>>>
>>> Signed-off-by: Peng Fan <peng....@nxp.com>
>>> Cc: Stefano Babic <sba...@denx.de>
>>> Cc: Fabio Estevam <fabio.este...@nxp.com>
>>> Cc: Anatolij Gustschin <ag...@denx.de>
>>> ---
>>> arch/arm/dts/Makefile | 2 +
>>> arch/arm/dts/fsl-imx8qxp-mek.dts | 136
>> ++++++++++++++++++++++++++
>>> arch/arm/mach-imx/imx8/Kconfig | 13 +++
>>> board/freescale/imx8qxp_mek/Kconfig | 14 +++
>>> board/freescale/imx8qxp_mek/MAINTAINERS | 6 ++
>>> board/freescale/imx8qxp_mek/Makefile | 7 ++
>>> board/freescale/imx8qxp_mek/README | 72 ++++++++++++++
>>> board/freescale/imx8qxp_mek/imx8qxp_mek.c | 152
>> +++++++++++++++++++++++++++++
>>> board/freescale/mx8mq_evk/README | 81
>> ++++++++++++++++
>>> configs/imx8qxp_mek_defconfig | 38 ++++++++
>>> include/configs/imx8qxp_mek.h | 156
>> ++++++++++++++++++++++++++++++
>>> 11 files changed, 677 insertions(+)
>>> create mode 100644 arch/arm/dts/fsl-imx8qxp-mek.dts create mode
>>> 100644 board/freescale/imx8qxp_mek/Kconfig
>>> create mode 100644 board/freescale/imx8qxp_mek/MAINTAINERS
>>> create mode 100644 board/freescale/imx8qxp_mek/Makefile
>>> create mode 100644 board/freescale/imx8qxp_mek/README
>>> create mode 100644 board/freescale/imx8qxp_mek/imx8qxp_mek.c
>>> create mode 100644 board/freescale/mx8mq_evk/README create mode
>>> 100644 configs/imx8qxp_mek_defconfig create mode 100644
>>> include/configs/imx8qxp_mek.h
>>>
>>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index
>>> 44ebc50bfa..61598bdfeb 100644
>>> --- a/arch/arm/dts/Makefile
>>> +++ b/arch/arm/dts/Makefile
>>> @@ -452,6 +452,8 @@ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
>>>
>>> dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
>>>
>>> +dtb-$(CONFIG_ARCH_IMX8) += fsl-imx8qxp-mek.dtb
>>> +
>>> dtb-$(CONFIG_RCAR_GEN3) += \
>>> r8a7795-h3ulcb.dtb \
>>> r8a7795-salvator-x.dtb \
>>> diff --git a/arch/arm/dts/fsl-imx8qxp-mek.dts
>>> b/arch/arm/dts/fsl-imx8qxp-mek.dts
>>> new file mode 100644
>>> index 0000000000..6c3bc1dc4d
>>> --- /dev/null
>>> +++ b/arch/arm/dts/fsl-imx8qxp-mek.dts
>>> @@ -0,0 +1,136 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * Copyright 2017-2018 NXP
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "fsl-imx8qxp.dtsi"
>>> +
>>> +/ {
>>> + model = "Freescale i.MX8QXP MEK";
>>> + compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp";
>>> +
>>> + chosen {
>>> + bootargs = "console=ttyLP0,115200
>> earlycon=lpuart32,0x5a060000,115200";
>>> + stdout-path = &lpuart0;
>>> + };
>>> +
>>> + regulators {
>>> + compatible = "simple-bus";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + reg_usdhc2_vmmc: usdhc2-vmmc {
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "SD1_SPWR";
>>> + regulator-min-microvolt = <3000000>;
>>> + regulator-max-microvolt = <3000000>;
>>> + gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
>>> + off-on-delay = <3480>;
>>> + enable-active-high;
>>> + };
>>> + };
>>> +};
>>> +
>>> +&iomuxc {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_hog>;
>>> +
>>> + imx8qxp-mek {
>>> + pinctrl_hog: hoggrp {
>>> + fsl,pins = <
>>> + SC_P_MCLK_OUT0_ADMA_ACM_MCLK_OUT0
>> 0x0600004c
>>> + SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD
>> 0x000514a0
>>> + >;
>>> + };
>>> +
>>> + pinctrl_ioexp_rst: ioexp-rst-grp {
>>> + fsl,pins = <
>>> + SC_P_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021
>>> + >;
>>> + };
>>> +
>>> + pinctrl_lpi2c1: lpi1cgrp {
>>> + fsl,pins = <
>>> + SC_P_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000021
>>> + SC_P_USB_SS3_TC3_ADMA_I2C1_SDA 0x06000021
>>> + >;
>>> + };
>>> +
>>> + pinctrl_lpuart0: lpuart0grp {
>>> + fsl,pins = <
>>> + SC_P_UART0_RX_ADMA_UART0_RX 0x06000020
>>> + SC_P_UART0_TX_ADMA_UART0_TX 0x06000020
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usdhc1: usdhc1grp {
>>> + fsl,pins = <
>>> + SC_P_EMMC0_CLK_CONN_EMMC0_CLK
>> 0x06000041
>>> + SC_P_EMMC0_CMD_CONN_EMMC0_CMD
>> 0x00000021
>>> + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0
>> 0x00000021
>>> + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1
>> 0x00000021
>>> + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2
>> 0x00000021
>>> + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3
>> 0x00000021
>>> + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4
>> 0x00000021
>>> + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5
>> 0x00000021
>>> + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6
>> 0x00000021
>>> + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7
>> 0x00000021
>>> + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE
>> 0x00000041
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usdhc2_gpio: usdhc2gpiogrp {
>>> + fsl,pins = <
>>> + SC_P_USDHC1_RESET_B_LSIO_GPIO4_IO19
>>> 0x00000021
>>> + SC_P_USDHC1_WP_LSIO_GPIO4_IO21
>>> 0x00000021
>>> + SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22
>>> 0x00000021
>>> + >;
>>> + };
>>> +
>>> + pinctrl_usdhc2: usdhc2grp {
>>> + fsl,pins = <
>>> + SC_P_USDHC1_CLK_CONN_USDHC1_CLK
>> 0x06000041
>>> + SC_P_USDHC1_CMD_CONN_USDHC1_CMD
>> 0x00000021
>>> + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0
>> 0x00000021
>>> + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1
>> 0x00000021
>>> + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2
>> 0x00000021
>>> + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3
>> 0x00000021
>>> + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT
>> 0x00000021
>>> + >;
>>> + };
>>> + };
>>> +};
>>> +
>>> +&lpuart0 {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_lpuart0>;
>>> + status = "okay";
>>> +};
>>> +
>>> +&i2c1 {
>>> + clock-frequency = <100000>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>;
>>> + pinctrl-assert-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
>>> + status = "okay";
>>> +};
>>> +
>>> +&usdhc1 {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usdhc1>;
>>> + bus-width = <8>;
>>> + non-removable;
>>> + status = "okay";
>>> +};
>>> +
>>> +&usdhc2 {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
>>> + bus-width = <4>;
>>> + cd-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
>>> + wp-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
>>> + vmmc-supply = <®_usdhc2_vmmc>;
>>> + status = "okay";
>>> +};
>>> diff --git a/arch/arm/mach-imx/imx8/Kconfig
>>> b/arch/arm/mach-imx/imx8/Kconfig index 28910c1509..0d3a87cd74 100644
>>> --- a/arch/arm/mach-imx/imx8/Kconfig
>>> +++ b/arch/arm/mach-imx/imx8/Kconfig
>>> @@ -10,4 +10,17 @@ config IMX8QXP
>>> config SYS_SOC
>>> default "imx8"
>>>
>>> +choice
>>> + prompt "i.MX8 board select"
>>> + optional
>>> +
>>> +config TARGET_IMX8QXP_MEK
>>> + bool "Support i.MX8QXP MEK board"
>>> + select BOARD_LATE_INIT
>>> + select IMX8QXP
>>> +
>>> +endchoice
>>> +
>>> +source "board/freescale/imx8qxp_mek/Kconfig"
>>> +
>>> endif
>>> diff --git a/board/freescale/imx8qxp_mek/Kconfig
>>> b/board/freescale/imx8qxp_mek/Kconfig
>>> new file mode 100644
>>> index 0000000000..b67300d816
>>> --- /dev/null
>>> +++ b/board/freescale/imx8qxp_mek/Kconfig
>>> @@ -0,0 +1,14 @@
>>> +if TARGET_IMX8QXP_MEK
>>> +
>>> +config SYS_BOARD
>>> + default "imx8qxp_mek"
>>> +
>>> +config SYS_VENDOR
>>> + default "freescale"
>>> +
>>> +config SYS_CONFIG_NAME
>>> + default "imx8qxp_mek"
>>> +
>>> +source "board/freescale/common/Kconfig"
>>> +
>>> +endif
>>> diff --git a/board/freescale/imx8qxp_mek/MAINTAINERS
>>> b/board/freescale/imx8qxp_mek/MAINTAINERS
>>> new file mode 100644
>>> index 0000000000..e9bf0b35a3
>>> --- /dev/null
>>> +++ b/board/freescale/imx8qxp_mek/MAINTAINERS
>>> @@ -0,0 +1,6 @@
>>> +i.MX8QXP MEK BOARD
>>> +M: Peng Fan <peng....@nxp.com>
>>> +S: Maintained
>>> +F: board/freescale/imx8qxp_mek/
>>> +F: include/configs/imx8qxp_mek.h
>>> +F: configs/imx8qxp_mek_defconfig
>>> diff --git a/board/freescale/imx8qxp_mek/Makefile
>>> b/board/freescale/imx8qxp_mek/Makefile
>>> new file mode 100644
>>> index 0000000000..f9ee8aeff3
>>> --- /dev/null
>>> +++ b/board/freescale/imx8qxp_mek/Makefile
>>> @@ -0,0 +1,7 @@
>>> +#
>>> +# Copyright 2017 NXP
>>> +#
>>> +# SPDX-License-Identifier: GPL-2.0+
>>> +#
>>> +
>>> +obj-y += imx8qxp_mek.o
>>> diff --git a/board/freescale/imx8qxp_mek/README
>>> b/board/freescale/imx8qxp_mek/README
>>> new file mode 100644
>>> index 0000000000..7f740894b2
>>> --- /dev/null
>>> +++ b/board/freescale/imx8qxp_mek/README
>>> @@ -0,0 +1,72 @@
>>> +U-Boot for the NXP i.MX8QXP EVK board
>>> +
>>> +Quick Start
>>> +===========
>>> +
>>> +- Build U-Boot
>>> +- Build the ARM Trusted firmware binary
>>> +- Get scfw_tcm.bin and ahab-container.img
>>> +- Get mkimage tool
>>> +- Generate flash.bin using imx-mkimage
>>> +- Flash the binary into the SD card
>>> +- Boot
>>> +
>>> +Build U-Boot
>>> +============
>>> +
>>> +$ make imx8qxp_mek_defconfig
>>> +$ make
>>> +
>>> +Get and Build the ARM Trusted firmware
>>> +======================================
>>> +
>>> +$ git clone
>>> +https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fso
>>>
>> +urce.codeaurora.org%2Fexternal%2Fimx%2Fimx-atf&data=02%7C01%7C
>> pen
>>>
>> +g.fan%40nxp.com%7C16559bddb09241959d1d08d62ab0de42%7C686ea1d3bc
>> 2b4c6f
>>>
>> +a92cd99c5c301635%7C0%7C0%7C636743336469804902&sdata=IGY1gR
>> Mq6v3qs
>>> +a5SQQTlMeyPSstvbethL9x%2FfOolL4c%3D&reserved=0
>>> +$ cd imx-atf/
>>> +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b
>>> +imx_4.9.88_imx8qxp_beta2 $ make PLAT=imx8qxp bl31
>>> +
>>> +Get scfw_tcm.bin and ahab-container.img
>>> +==============================
>>> +
>>> +$ wget
>>> +https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww
>>>
>> +w.nxp.com%2Flgfiles%2FNMG%2FMAD%2FYOCTO%2Fimx-sc-firmware-0.7.bin
>> &
>>>
>> +;data=02%7C01%7Cpeng.fan%40nxp.com%7C16559bddb09241959d1d08d62a
>> b0de42
>>>
>> +%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6367433364698049
>> 02&
>>>
>> +sdata=KKPP3UvcGXjgGYEyqMfyXfnJ8xCqCMyEzAtW%2FtLfM5I%3D&rese
>> rved=0
>>> +$ chmod +x imx-sc-firmware-0.7.bin
>>> +$ ./imx-sc-firmware-0.7.bin
>>> +$ wget
>>> +https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww
>>>
>> +w.nxp.com%2Flgfiles%2FNMG%2FMAD%2FYOCTO%2Ffirmware-imx-7.6.bin&a
>> mp;da
>>>
>> +ta=02%7C01%7Cpeng.fan%40nxp.com%7C16559bddb09241959d1d08d62ab0
>> de42%7C
>>>
>> +686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636743336469804902&
>> amp;sda
>>>
>> +ta=wrb3TqG9ETCnEAFp4PBBal5BNOuS9tCBbgs2pTpKAnM%3D&reserved
>> =0
>>> +$ chmod +x firmware-imx-7.6.bin
>>> +$ ./firmware-imx-7.6.bin
>>> +
>>> +Get imx-mkimage tool
>>> +==============================
>>> +Download the imx-mkimage tool:
>>> +
>>> +$ git clone
>>> +https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fso
>>>
>> +urce.codeaurora.org%2Fexternal%2Fimx%2Fimx-mkimage%2F&data=02
>> %7C0
>>>
>> +1%7Cpeng.fan%40nxp.com%7C16559bddb09241959d1d08d62ab0de42%7C68
>> 6ea1d3b
>>>
>> +c2b4c6fa92cd99c5c301635%7C0%7C0%7C636743336469804902&sdata=
>> R3IioX
>>> +Srr0lUpsB%2BLgniD2NakzUHfEoGofBWm321Lb8%3D&reserved=0
>>> +$ cd imx-mkimage/
>>> +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b
>>> +imx_4.9.88_imx8qxp_beta2
>>
>> I took a look at the source code. We cannot even say that this was started by
>> NXP, because it is clearly based on the original U-Boot mainline code. Having
>> forked it, it is quite bad. We tried in the past to include tools (see i.MX
>> / Atmel /
>> TI ..) into U-Boot code instead of using external tools, and it is a pity to
>> revert
>> this back with i.MX8.
>>
>> This is generally not accepted in mainline - can we revert and integrate this
>> imx-mkimage into U-Boot's mkimage tool ?
>>
>> Best regards,
>> Stefano
>>
>>> +
>>> +
>>> +Generate flash.bin using imx-mkimage
>>> +====================================
>>> +
>>> +Copy the following binaries to imx-mkimage/iMX8M folder:
>>> +
>>> +$ cp imx-atf/build/imx8qxp/release/bl31.bin imx-mkimage/iMX8QX/ $ cp
>>> +u-boot/u-boot.bin imx-mkimage/iMX8QX/
>>> +
>>> +Copy the following firmwares to imx-mkimage/iMX8 folder :
>>> +
>>> +$ cp firmware-imx-7.6/firmware/seco/ahab-container.img
>>> +imx-mkimage/iMX8QX/ $ cp imx-sc-firmware-0.7/mx8qx-mek-scfw-tcm.bin
>>> +imx-mkimage/iMX8QX/scfw_tcm.bin
>>> +
>>> +$ cd imx-mkimage/
>>> +$ make SOC=iMX8QX flash
>>> +
>>> +Flash the binary into the SD card
>>> +=================================
>>> +
>>> +Burn the flash.bin binary to SD card offset 32KB:
>>> +
>>> +$ sudo dd if=iMX8QX/flash.bin of=/dev/sd[x] bs=1024 seek=32
>>> +
>>> +Boot
>>> +====
>>> +Set Boot switch SW2: 1100.
>>> diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
>>> b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
>>> new file mode 100644
>>> index 0000000000..051c852c5d
>>> --- /dev/null
>>> +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
>>> @@ -0,0 +1,152 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * Copyright 2018 NXP
>>> + */
>>> +
>>> +#include <common.h>
>>> +#include <errno.h>
>>> +#include <linux/libfdt.h>
>>> +#include <environment.h>
>>> +#include <fsl_esdhc.h>
>>> +#include <asm/io.h>
>>> +#include <asm/gpio.h>
>>> +#include <asm/arch/clock.h>
>>> +#include <asm/arch/sci/sci.h>
>>> +#include <asm/arch/imx8-pins.h>
>>> +#include <asm/arch/iomux.h>
>>> +#include <asm/arch/sys_proto.h>
>>> +
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> +#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL <<
>> PADRING_CONFIG_SHIFT) | \
>>> + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
>>> + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
>>> + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
>>> +
>>> +#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN <<
>> PADRING_CONFIG_SHIFT) | \
>>> + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
>>> + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
>>> + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
>>> +
>>> +static iomux_cfg_t uart0_pads[] = {
>>> + SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
>>> + SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL), };
>>> +
>>> +static void setup_iomux_uart(void)
>>> +{
>>> + imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
>>> +}
>>> +
>>> +int board_early_init_f(void)
>>> +{
>>> + int ret;
>>> + /* Set UART0 clock root to 80 MHz */
>>> + sc_pm_clock_rate_t rate = 80000000;
>>> +
>>> + /* Power up UART0 */
>>> + ret = sc_pm_set_resource_power_mode(-1, SC_R_UART_0,
>> SC_PM_PW_MODE_ON);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + ret = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, &rate);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + /* Enable UART0 clock root */
>>> + ret = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + setup_iomux_uart();
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +#ifdef CONFIG_MXC_GPIO
>>> +#define IOEXP_RESET IMX_GPIO_NR(1, 1)
>>> +
>>> +static iomux_cfg_t board_gpios[] = {
>>> + SC_P_SPI2_SDO | MUX_MODE_ALT(4) |
>> MUX_PAD_CTRL(GPIO_PAD_CTRL),
>>> + SC_P_ENET0_REFCLK_125M_25M | MUX_MODE_ALT(4) |
>>> + MUX_PAD_CTRL(GPIO_PAD_CTRL),
>>> +};
>>> +
>>> +static void board_gpio_init(void)
>>> +{
>>> + int ret;
>>> + struct gpio_desc desc;
>>> +
>>> + ret = dm_gpio_lookup_name("gpio@1a_3", &desc);
>>> + if (ret)
>>> + return;
>>> +
>>> + ret = dm_gpio_request(&desc, "bb_per_rst_b");
>>> + if (ret)
>>> + return;
>>> +
>>> + dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
>>> + dm_gpio_set_value(&desc, 0);
>>> + udelay(50);
>>> + dm_gpio_set_value(&desc, 1);
>>> +
>>> + imx8_iomux_setup_multiple_pads(board_gpios,
>>> +ARRAY_SIZE(board_gpios));
>>> +
>>> + /* enable i2c port expander assert reset line */
>>> + gpio_request(IOEXP_RESET, "ioexp_rst");
>>> + gpio_direction_output(IOEXP_RESET, 1); } #endif
>>> +
>>> +int checkboard(void)
>>> +{
>>> + puts("Board: iMX8QXP MEK\n");
>>> +
>>> + print_bootinfo();
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +int board_init(void)
>>> +{
>>> +#ifdef CONFIG_MXC_GPIO
>>> + board_gpio_init();
>>> +#endif
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +void detail_board_ddr_info(void)
>>> +{
>>> + puts("\nDDR ");
>>> +}
>>> +
>>> +/*
>>> + * Board specific reset that is system reset.
>>> + */
>>> +void reset_cpu(ulong addr)
>>> +{
>>> + /* TODO */
>>> +}
>>> +
>>> +#ifdef CONFIG_OF_BOARD_SETUP
>>> +int ft_board_setup(void *blob, bd_t *bd) {
>>> + return 0;
>>> +}
>>> +#endif
>>> +
>>> +int board_mmc_get_env_dev(int devno)
>>> +{
>>> + return devno;
>>> +}
>>> +
>>> +int board_late_init(void)
>>> +{
>>> +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
>>> + env_set("board_name", "MEK");
>>> + env_set("board_rev", "iMX8QXP");
>>> +#endif
>>> +
>>> + return 0;
>>> +}
>>> diff --git a/board/freescale/mx8mq_evk/README
>>> b/board/freescale/mx8mq_evk/README
>>> new file mode 100644
>>> index 0000000000..cd7e67eec5
>>> --- /dev/null
>>> +++ b/board/freescale/mx8mq_evk/README
>>> @@ -0,0 +1,81 @@
>>> +U-Boot for the NXP i.MX8MQ EVK board
>>> +
>>> +Quick Start
>>> +===========
>>> +
>>> +- Build U-Boot
>>> +- Build the ARM Trusted firmware binary
>>> +- Get DDR firmware and mkimage tool
>>> +- Generate flash.bin using imx-mkimage
>>> +- Flash the binary into the SD card
>>> +- Boot
>>> +
>>> +Build U-Boot
>>> +============
>>> +
>>> +$ make mx8mq_evk_defconfig
>>> +$ make
>>> +
>>> +Get and Build the ARM Trusted firmware
>>> +======================================
>>> +
>>> +$ git clone
>>> +https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fso
>>>
>> +urce.codeaurora.org%2Fexternal%2Fimx%2Fimx-atf&data=02%7C01%7C
>> pen
>>>
>> +g.fan%40nxp.com%7C16559bddb09241959d1d08d62ab0de42%7C686ea1d3bc
>> 2b4c6f
>>>
>> +a92cd99c5c301635%7C0%7C0%7C636743336469804902&sdata=IGY1gR
>> Mq6v3qs
>>> +a5SQQTlMeyPSstvbethL9x%2FfOolL4c%3D&reserved=0
>>> +$ cd imx-atf/
>>> +$ git checkout origin/imx_4.9.51_imx8m_beta $ make PLAT=imx8mq bl31
>>> +
>>> +Get the DDR firmware and mkimage tool
>> ==============================
>>> +
>>> +$ wget
>>> +https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww
>>>
>> +w.nxp.com%2Flgfiles%2FNMG%2FMAD%2FYOCTO%2Ffirmware-imx-7.2.bin&a
>> mp;da
>>>
>> +ta=02%7C01%7Cpeng.fan%40nxp.com%7C16559bddb09241959d1d08d62ab0
>> de42%7C
>>>
>> +686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636743336469804902&
>> amp;sda
>>>
>> +ta=OExVnUkK7Wn70OaZdd0DL1wijv3b%2F5UWyCarxw3fRcA%3D&reser
>> ved=0
>>> +$ chmod +x firmware-imx-7.2.bin
>>> +$ ./firmware-imx-7.2.bin
>>> +
>>> +Download the imx-mkimage tool:
>>> +
>>> +$ git clone
>>> +https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fso
>>>
>> +urce.codeaurora.org%2Fexternal%2Fimx%2Fimx-mkimage%2F&data=02
>> %7C0
>>>
>> +1%7Cpeng.fan%40nxp.com%7C16559bddb09241959d1d08d62ab0de42%7C68
>> 6ea1d3b
>>>
>> +c2b4c6fa92cd99c5c301635%7C0%7C0%7C636743336469804902&sdata=
>> R3IioX
>>> +Srr0lUpsB%2BLgniD2NakzUHfEoGofBWm321Lb8%3D&reserved=0
>>> +$ cd imx-mkimage/
>>> +$ git checkout origin/imx_4.9.51_imx8m_beta
>>> +
>>> +
>>> +Generate flash.bin using imx-mkimage
>>> +====================================
>>> +
>>> +Copy the following binaries to imx-mkimage/iMX8M folder:
>>> +
>>> +$ cp imx-atf/build/imx8mq/release/bl31.bin imx-mkimage/iMX8M/ $ cp
>>> +u-boot/u-boot-nodtb.bin imx-mkimage/iMX8M/ $ cp
>>> +u-boot/spl/u-boot-spl.bin imx-mkimage/iMX8M/ $ cp
>>> +u-boot/arch/arm/dts/fsl-imx8mq-evk.dtb imx-mkimage/iMX8M/
>>> +
>>> +Copy the following firmwares to imx-mkimage/iMX8 folder :
>>> +
>>> +$ cp
>>> +firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem.bin
>>> +imx-mkimage/iMX8M/ $ cp
>>> +firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem.bin
>>> +imx-mkimage/iMX8M/ $ cp
>>> +firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem.bin
>>> +imx-mkimage/iMX8M/ $ cp
>>> +firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem.bin
>>> +imx-mkimage/iMX8M/
>>> +
>>> +If you want to run with HDMI, copy signed_hdmi_imx8m.bin to
>> imx-mkimage/iMX8M.
>>> +
>>> +Before generating the flash.bin, transfer the mkimage generated by U-Boot
>> to iMX8M folder:
>>> +
>>> +$ cp u-boot/tools/mkimage imx-mkimage/iMX8M/ $ mv
>>> +imx-mkimage/iMX8M/mkimage imx-mkimage/iMX8M/mkimage_uboot
>>> +
>>> +$ cd imx-mkimage/
>>> +$ make SOC=iMX8M flash_spl_uboot
>>> +
>>> +Or for using HDMI:
>>> +
>>> +$ make SOC=iMX8M flash_hdmi_spl_uboot
>>> +
>>> +Flash the binary into the SD card
>>> +=================================
>>> +
>>> +Burn the flash.bin binary to SD card offset 33KB:
>>> +
>>> +$ sudo dd if=iMX8M/flash.bin of=/dev/sd[x] bs=1024 seek=33
>>> +
>>> +Boot
>>> +====
>>> +Set Boot switch SW801: 1100 and Bmode: 10 to boot from Micro SD.
>>> diff --git a/configs/imx8qxp_mek_defconfig
>>> b/configs/imx8qxp_mek_defconfig new file mode 100644 index
>>> 0000000000..873f30c9c5
>>> --- /dev/null
>>> +++ b/configs/imx8qxp_mek_defconfig
>>> @@ -0,0 +1,38 @@
>>> +CONFIG_ARM=y
>>> +CONFIG_ARCH_IMX8=y
>>> +CONFIG_SYS_TEXT_BASE=0x80020000
>>> +CONFIG_SYS_MALLOC_F_LEN=0x2000
>>> +CONFIG_TARGET_IMX8QXP_MEK=y
>>> +CONFIG_NR_DRAM_BANKS=3
>>> +CONFIG_BOOTDELAY=3
>>> +# CONFIG_CMD_IMPORTENV is not set
>>> +CONFIG_CMD_GPIO=y
>>> +CONFIG_CMD_I2C=y
>>> +CONFIG_CMD_MMC=y
>>> +CONFIG_CMD_DHCP=y
>>> +CONFIG_CMD_MII=y
>>> +CONFIG_CMD_PING=y
>>> +CONFIG_CMD_CACHE=y
>>> +CONFIG_CMD_FAT=y
>>> +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek"
>>> +CONFIG_ENV_IS_IN_MMC=y
>>> +CONFIG_CLK_IMX8=y
>>> +CONFIG_DM_GPIO=y
>>> +CONFIG_DM_PCA953X=y
>>> +CONFIG_DM_I2C=y
>>> +CONFIG_SYS_I2C_IMX_LPI2C=y
>>> +CONFIG_I2C_MUX=y
>>> +CONFIG_I2C_MUX_PCA954x=y
>>> +CONFIG_MISC=y
>>> +CONFIG_DM_MMC=y
>>> +CONFIG_DM_ETH=y
>>> +CONFIG_PINCTRL=y
>>> +CONFIG_PINCTRL_IMX8=y
>>> +CONFIG_POWER_DOMAIN=y
>>> +CONFIG_IMX8_POWER_DOMAIN=y
>>> +CONFIG_DM_REGULATOR=y
>>> +CONFIG_DM_REGULATOR_FIXED=y
>>> +CONFIG_DM_REGULATOR_GPIO=y
>>> +CONFIG_DM_SERIAL=y
>>> +CONFIG_FSL_LPUART=y
>>> +# CONFIG_EFI_LOADER is not set
>>> diff --git a/include/configs/imx8qxp_mek.h
>>> b/include/configs/imx8qxp_mek.h new file mode 100644 index
>>> 0000000000..82553ce790
>>> --- /dev/null
>>> +++ b/include/configs/imx8qxp_mek.h
>>> @@ -0,0 +1,156 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ */
>>> +/*
>>> + * Copyright 2018 NXP
>>> + */
>>> +
>>> +#ifndef __IMX8QXP_MEK_H
>>> +#define __IMX8QXP_MEK_H
>>> +
>>> +#include <linux/sizes.h>
>>> +#include <asm/arch/imx-regs.h>
>>> +
>>> +#define CONFIG_REMAKE_ELF
>>> +
>>> +#define CONFIG_BOARD_EARLY_INIT_F
>>> +
>>> +/* Flat Device Tree Definitions */
>>> +#define CONFIG_OF_BOARD_SETUP
>>> +
>>> +#undef CONFIG_CMD_EXPORTENV
>>> +#undef CONFIG_CMD_IMPORTENV
>>> +#undef CONFIG_CMD_IMLS
>>> +
>>> +#undef CONFIG_CMD_CRC32
>>> +#undef CONFIG_BOOTM_NETBSD
>>> +
>>> +#define CONFIG_FSL_ESDHC
>>> +#define CONFIG_FSL_USDHC
>>> +#define CONFIG_SYS_FSL_ESDHC_ADDR 0
>>> +#define USDHC1_BASE_ADDR 0x5B010000
>>> +#define USDHC2_BASE_ADDR 0x5B020000
>>> +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
>>> +
>>> +#define CONFIG_ENV_OVERWRITE
>>> +
>>> +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
>>> +
>>> +/* GPIO configs */
>>> +#define CONFIG_MXC_GPIO
>>> +
>>> +/* Initial environment variables */
>>> +#define CONFIG_EXTRA_ENV_SETTINGS \
>>> + "script=boot.scr\0" \
>>> + "image=Image\0" \
>>> + "panel=NULL\0" \
>>> + "console=ttyLP0,${baudrate}
>> earlycon=lpuart32,0x5a060000,${baudrate}\0" \
>>> + "fdt_addr=0x83000000\0" \
>>> + "fdt_high=0xffffffffffffffff\0" \
>>> + "boot_fdt=try\0" \
>>> + "fdt_file=fsl-imx8qxp-mek.dtb\0" \
>>> + "initrd_addr=0x83800000\0" \
>>> + "initrd_high=0xffffffffffffffff\0" \
>>> + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
>>> + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
>>> + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
>>> + "mmcautodetect=yes\0" \
>>> + "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
>>> + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
>> ${script};\0" \
>>> + "bootscript=echo Running bootscript from mmc ...; " \
>>> + "source\0" \
>>> + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0"
>> \
>>> + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
>>> + "mmcboot=echo Booting from mmc ...; " \
>>> + "run mmcargs; " \
>>> + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
>>> + "if run loadfdt; then " \
>>> + "booti ${loadaddr} - ${fdt_addr}; " \
>>> + "else " \
>>> + "echo WARN: Cannot load the DT; " \
>>> + "fi; " \
>>> + "else " \
>>> + "echo wait for boot; " \
>>> + "fi;\0" \
>>> + "netargs=setenv bootargs console=${console} " \
>>> + "root=/dev/nfs " \
>>> + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
>>> + "netboot=echo Booting from net ...; " \
>>> + "run netargs; " \
>>> + "if test ${ip_dyn} = yes; then " \
>>> + "setenv get_cmd dhcp; " \
>>> + "else " \
>>> + "setenv get_cmd tftp; " \
>>> + "fi; " \
>>> + "${get_cmd} ${loadaddr} ${image}; " \
>>> + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
>>> + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
>>> + "booti ${loadaddr} - ${fdt_addr}; " \
>>> + "else " \
>>> + "echo WARN: Cannot load the DT; " \
>>> + "fi; " \
>>> + "else " \
>>> + "booti; " \
>>> + "fi;\0"
>>> +
>>> +#define CONFIG_BOOTCOMMAND \
>>> + "mmc dev ${mmcdev}; if mmc rescan; then " \
>>> + "if run loadbootscript; then " \
>>> + "run bootscript; " \
>>> + "else " \
>>> + "if run loadimage; then " \
>>> + "run mmcboot; " \
>>> + "else run netboot; " \
>>> + "fi; " \
>>> + "fi; " \
>>> + "else booti ${loadaddr} - ${fdt_addr}; fi"
>>> +
>>> +/* Link Definitions */
>>> +#define CONFIG_LOADADDR 0x80280000
>>> +
>>> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
>>> +
>>> +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
>>> +
>>> +/* Default environment is in SD */
>>> +#define CONFIG_ENV_SIZE 0x1000
>>> +#define CONFIG_ENV_OFFSET (64 * SZ_64K)
>>> +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
>>> +
>>> +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
>>> +
>>> +/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board
>> */
>>> +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
>>> +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2
>> */
>>> +#define CONFIG_SYS_FSL_USDHC_NUM 2
>>> +
>>> +/* Size of malloc() pool */
>>> +#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024))
>> * 1024)
>>> +
>>> +#define CONFIG_SYS_SDRAM_BASE 0x80000000
>>> +#define PHYS_SDRAM_1 0x80000000
>>> +#define PHYS_SDRAM_2 0x880000000
>>> +#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
>>> +/* LPDDR4 board total DDR is 3GB */
>>> +#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
>>> +
>>> +/* Serial */
>>> +#define CONFIG_BAUDRATE 115200
>>> +
>>> +/* Monitor Command Prompt */
>>> +#define CONFIG_HUSH_PARSER
>>> +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
>>> +#define CONFIG_SYS_CBSIZE 2048
>>> +#define CONFIG_SYS_MAXARGS 64
>>> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
>>> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
>>> + sizeof(CONFIG_SYS_PROMPT) + 16)
>>> +
>>> +/* Generic Timer Definitions */
>>> +#define COUNTER_FREQUENCY 8000000 /* 8MHz */
>>> +
>>> +#ifndef CONFIG_DM_PCA953X
>>> +#define CONFIG_PCA953X
>>> +#define CONFIG_CMD_PCA953X
>>> +#define CONFIG_CMD_PCA953X_INFO
>>> +#endif
>>> +
>>> +#endif /* __IMX8QXP_MEK_H */
>>>
>>
>>
>> --
>> ================================================================
>> =====
>> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
>> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
>> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
>> ================================================================
>> =====
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=====================================================================
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