It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.
Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
Cc: Masahiro Yamada <yamada.masah...@socionext.com>
---
drivers/mmc/renesas-sdhi.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 813cf8749b..05a100754a 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -51,12 +51,9 @@ static unsigned int renesas_sdhi_init_tuning(struct
tmio_sd_priv *priv)
tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL);
/* Set sampling clock selection range */
- tmio_sd_writel(priv, 0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT,
- RENESAS_SDHI_SCC_DTCNTL);
-
- reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL);
- reg |= RENESAS_SDHI_SCC_DTCNTL_TAPEN;
- tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_DTCNTL);
+ tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
+ RENESAS_SDHI_SCC_DTCNTL_TAPEN,
+ RENESAS_SDHI_SCC_DTCNTL);
reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL);
reg |= RENESAS_SDHI_SCC_CKSEL_DTSEL;
--
2.18.0
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