> -----Original Message-----
> From: Gary Bisson [mailto:gary.bis...@boundarydevices.com]
> Sent: 2018年11月15日 0:55
> To: u-boot@lists.denx.de
> Cc: sba...@denx.de; Fabio Estevam <fabio.este...@nxp.com>; Peng Fan
> <peng....@nxp.com>; dl-linux-imx <linux-...@nxp.com>; Gary Bisson
> <gary.bis...@boundarydevices.com>
> Subject: [PATCH 1/2] imx: mx8m: add memory mapping for CAAM and TCM
> 
> Otherwise can't boot the M4 core as it is impossible to load its firmware into
> the TCM memory.
> 
> Signed-off-by: Gary Bisson <gary.bis...@boundarydevices.com>
> ---
>  arch/arm/mach-imx/mx8m/soc.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/mx8m/soc.c
> b/arch/arm/mach-imx/mx8m/soc.c index 46873aa8dd..11251c5f9a 100644
> --- a/arch/arm/mach-imx/mx8m/soc.c
> +++ b/arch/arm/mach-imx/mx8m/soc.c
> @@ -77,6 +77,22 @@ static struct mm_region imx8m_mem_map[] = {
>               .size = 0x100000UL,
>               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
>                        PTE_BLOCK_OUTER_SHARE
> +     }, {
> +             /* CAAM */
> +             .virt = 0x100000UL,
> +             .phys = 0x100000UL,
> +             .size = 0x8000UL,
> +             .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +                      PTE_BLOCK_NON_SHARE |
> +                      PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +     }, {
> +             /* TCM */
> +             .virt = 0x7C0000UL,
> +             .phys = 0x7C0000UL,
> +             .size = 0x80000UL,
> +             .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +                      PTE_BLOCK_NON_SHARE |
> +                      PTE_BLOCK_PXN | PTE_BLOCK_UXN
>       }, {
>               /* OCRAM */
>               .virt = 0x900000UL,

Reviewed-by: Peng Fan <peng....@nxp.com>
> --
> 2.19.1

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