On Mon, Nov 19, 2018 at 6:19 AM Hannes Schmelzer <oe5...@oevsv.at> wrote: > > There are still systems running which do not have any LAPIC or even > IOAPIC. Responsible MSRs for those do not exist and the systems are > crashing on trying setup LAPIC. > > So this commit makes the APIC stuff able to switch off for those boards > which dont' have a LAPIC / IOAPIC. > > Signed-off-by: Hannes Schmelzer <oe5...@oevsv.at> > --- > > Changes in v2: > - rebase to curent master > - reword commit message to be more clear > - fix typo in Kconfig > - re-add blank line in interrupt.c > > arch/x86/Kconfig | 9 +++++++++ > arch/x86/cpu/Makefile | 2 +- > arch/x86/cpu/i386/interrupt.c | 2 ++ > 3 files changed, 12 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index a1c18d2..8d839e4 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -736,6 +736,15 @@ config I8259_PIC > slave) interrupt controllers. Include this to have U-Boot set up > the interrupt correctly. > > +config APIC > + bool > + default y > + help > + The (A)dvanced (P)rogrammable (I)nterrupt (C)ontroller is > responsible > + for catching interrupts and distributing them to one more CPU cores.
one "or" more > + In most cases there is some LAPIC (local) for each core and one There are some LAPICs > + I/O APIC. This conjunction is found on most modern x86 systems. > + > config PINCTRL_ICH6 > bool > help > diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile > index f862d8c..54668aa 100644 > --- a/arch/x86/cpu/Makefile > +++ b/arch/x86/cpu/Makefile > @@ -35,7 +35,7 @@ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/ > obj-$(CONFIG_INTEL_QUARK) += quark/ > obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/ > obj-$(CONFIG_INTEL_TANGIER) += tangier/ > -obj-y += lapic.o ioapic.o > +obj-$(CONFIG_APIC) += lapic.o ioapic.o > obj-y += irq.o > ifndef CONFIG_$(SPL_)X86_64 > obj-$(CONFIG_SMP) += mp_init.o > diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c > index ed8423e..bf9526b 100644 > --- a/arch/x86/cpu/i386/interrupt.c > +++ b/arch/x86/cpu/i386/interrupt.c > @@ -264,8 +264,10 @@ int interrupt_init(void) > i8259_init(); > #endif > > +#ifdef CONFIG_APIC > lapic_setup(); > > +#endif oops, I meant to say the #endif should be followed immediately and leave the blank line between the #endif and the next line. > /* Initialize core interrupt and exception functionality of CPU */ > cpu_init_interrupts(); > > -- Reviewed-by: Bin Meng <bmeng...@gmail.com> I can fix all above nits when applying. Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot