This board has not been converted to CONFIG_DM_BLK by the deadline.
Remove it.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/arm/cpu/arm926ejs/lpc32xx/Kconfig | 1 -
board/timll/devkit3250/Kconfig | 12 --
board/timll/devkit3250/MAINTAINERS | 6 -
board/timll/devkit3250/Makefile | 7 -
board/timll/devkit3250/devkit3250.c | 80 ----------
board/timll/devkit3250/devkit3250_spl.c | 67 --------
configs/devkit3250_defconfig | 48 ------
include/configs/devkit3250.h | 194 ------------------------
8 files changed, 415 deletions(-)
delete mode 100644 board/timll/devkit3250/Kconfig
delete mode 100644 board/timll/devkit3250/MAINTAINERS
delete mode 100644 board/timll/devkit3250/Makefile
delete mode 100644 board/timll/devkit3250/devkit3250.c
delete mode 100644 board/timll/devkit3250/devkit3250_spl.c
delete mode 100644 configs/devkit3250_defconfig
delete mode 100644 include/configs/devkit3250.h
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig
b/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig
index 986ad738ac1..407252c8c30 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig
@@ -14,7 +14,6 @@ config TARGET_WORK_92105
endchoice
-source "board/timll/devkit3250/Kconfig"
source "board/work-microwave/work_92105/Kconfig"
endif
diff --git a/board/timll/devkit3250/Kconfig b/board/timll/devkit3250/Kconfig
deleted file mode 100644
index 5129c2dcae5..00000000000
--- a/board/timll/devkit3250/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_DEVKIT3250
-
-config SYS_BOARD
- default "devkit3250"
-
-config SYS_VENDOR
- default "timll"
-
-config SYS_CONFIG_NAME
- default "devkit3250"
-
-endif
diff --git a/board/timll/devkit3250/MAINTAINERS
b/board/timll/devkit3250/MAINTAINERS
deleted file mode 100644
index cb93563feda..00000000000
--- a/board/timll/devkit3250/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-DEVKIT3250 BOARD
-M: Vladimir Zapolskiy <v...@mleia.com>
-S: Maintained
-F: board/timll/devkit3250/
-F: include/configs/devkit3250.h
-F: configs/devkit3250_defconfig
diff --git a/board/timll/devkit3250/Makefile b/board/timll/devkit3250/Makefile
deleted file mode 100644
index 056813995eb..00000000000
--- a/board/timll/devkit3250/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2011 by Vladimir Zapolskiy <v...@mleia.com>
-# Copyright (C) 2008, Guennadi Liakhovetski <l...@denx.de>
-
-obj-y := devkit3250.o
-obj-$(CONFIG_SPL_BUILD) += devkit3250_spl.o
diff --git a/board/timll/devkit3250/devkit3250.c
b/board/timll/devkit3250/devkit3250.c
deleted file mode 100644
index a4b963d463a..00000000000
--- a/board/timll/devkit3250/devkit3250.c
+++ /dev/null
@@ -1,80 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Embest/Timll DevKit3250 board support
- *
- * Copyright (C) 2011-2015 Vladimir Zapolskiy <v...@mleia.com>
- */
-
-#include <common.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/emc.h>
-#include <asm/arch/wdt.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;
-static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
-static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;
-
-void reset_periph(void)
-{
- /* This function resets peripherals by triggering RESOUT_N */
- setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
- writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl);
- udelay(300);
-
- writel(0, &wdt->mctrl);
- clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
-
- /* Such a long delay is needed to initialize SMSC phy */
- udelay(10000);
-}
-
-int board_early_init_f(void)
-{
- lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
- lpc32xx_i2c_init(1);
- lpc32xx_i2c_init(2);
- lpc32xx_ssp_init();
- lpc32xx_mac_init();
-
- /*
- * nWP may be controlled by GPO19, but unpopulated by default R23
- * makes no sense to configure this GPIO level, nWP is always high
- */
- lpc32xx_slc_nand_init();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_SYS_FLASH_CFI
- /* Use 16-bit memory interface for NOR Flash */
- emc->stat[0].config = EMC_STAT_CONFIG_PB | EMC_STAT_CONFIG_16BIT;
-
- /* Change the NOR timings to optimum value to get maximum bandwidth */
- emc->stat[0].waitwen = EMC_STAT_WAITWEN(1);
- emc->stat[0].waitoen = EMC_STAT_WAITOEN(0);
- emc->stat[0].waitrd = EMC_STAT_WAITRD(12);
- emc->stat[0].waitpage = EMC_STAT_WAITPAGE(12);
- emc->stat[0].waitwr = EMC_STAT_WAITWR(5);
- emc->stat[0].waitturn = EMC_STAT_WAITTURN(2);
-#endif
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
-
- return 0;
-}
diff --git a/board/timll/devkit3250/devkit3250_spl.c
b/board/timll/devkit3250/devkit3250_spl.c
deleted file mode 100644
index 47af78ae0b1..00000000000
--- a/board/timll/devkit3250/devkit3250_spl.c
+++ /dev/null
@@ -1,67 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Timll DevKit3250 board support, SPL board configuration
- *
- * (C) Copyright 2015 Vladimir Zapolskiy <v...@mleia.com>
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/emc.h>
-#include <asm/arch-lpc32xx/gpio.h>
-#include <spl.h>
-
-static struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
-
-/*
- * SDRAM K4S561632N-LC60 settings are selected in assumption that
- * SDRAM clock may be set up to 166 MHz, however at the moment
- * it is 104 MHz. Most delay values are converted to be a multiple of
- * base clock, and precise pinned values are not needed here.
- */
-struct emc_dram_settings dram_64mb = {
- .cmddelay = 0x0001C000,
- .config0 = 0x00005682,
- .rascas0 = 0x00000302,
- .rdconfig = 0x00000011, /* undocumented but crucial value */
-
- .trp = 83333333,
- .tras = 23809524,
- .tsrex = 12500000,
- .twr = 83000000, /* tWR = tRDL = 2 CLK */
- .trc = 15384616,
- .trfc = 15384616,
- .txsr = 12500000,
- .trrd = 1,
- .tmrd = 1,
- .tcdlr = 0,
-
- .refresh = 130000, /* 800 clock cycles */
-
- .mode = 0x00018000,
- .emode = 0x02000000,
-};
-
-void spl_board_init(void)
-{
- /* First of all silence buzzer controlled by GPO_20 */
- writel((1 << 20), &gpio->p3_outp_clr);
-
- lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
- preloader_console_init();
-
- ddr_init(&dram_64mb);
-
- /*
- * NAND initialization is done by nand_init(),
- * here just enable NAND SLC clocks
- */
- lpc32xx_slc_nand_init();
-}
-
-u32 spl_boot_device(void)
-{
- return BOOT_DEVICE_NAND;
-}
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
deleted file mode 100644
index b739f27803b..00000000000
--- a/configs/devkit3250_defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_LPC32XX=y
-CONFIG_SYS_TEXT_BASE=0x83F00000
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_BOOTDELAY=1
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200n8"
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_ENV_IS_IN_NAND=y
-# CONFIG_MMC is not set
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_PROTECTION=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
-CONFIG_NAND_LPC32XX_SLC=y
-CONFIG_SPL_NAND_SIMPLE=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_ADDR_ENABLE=y
-CONFIG_PHY_ADDR=31
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_LPC32XX_SSP=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
deleted file mode 100644
index 2f8c655b2cc..00000000000
--- a/include/configs/devkit3250.h
+++ /dev/null
@@ -1,194 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Embest/Timll DevKit3250 board configuration file
- *
- * Copyright (C) 2011-2015 Vladimir Zapolskiy <v...@mleia.com>
- */
-
-#ifndef __CONFIG_DEVKIT3250_H__
-#define __CONFIG_DEVKIT3250_H__
-
-/* SoC and board defines */
-#include <linux/sizes.h>
-#include <asm/arch/cpu.h>
-
-#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250
-
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
-#if !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-/*
- * Memory configurations
- */
-#define CONFIG_SYS_MALLOC_LEN SZ_1M
-#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
-#define CONFIG_SYS_SDRAM_SIZE SZ_64M
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M)
-
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K)
-
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
- - GENERATED_GBL_DATA_SIZE)
-
-/*
- * Serial Driver
- */
-#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */
-
-/*
- * DMA
- */
-#if !defined(CONFIG_SPL_BUILD)
-#define CONFIG_DMA_LPC32XX
-#endif
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_LPC32XX
-#define CONFIG_SYS_I2C_SPEED 100000
-
-/*
- * GPIO
- */
-#define CONFIG_LPC32XX_GPIO
-
-/*
- * SSP/SPI
- */
-#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
-
-/*
- * Ethernet
- */
-#define CONFIG_RMII
-#define CONFIG_PHY_SMSC
-#define CONFIG_LPC32XX_ETH
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-/*
- * NOR Flash
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 71
-#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE
-#define CONFIG_SYS_FLASH_SIZE SZ_4M
-
-/*
- * NAND controller
- */
-#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-
-/*
- * NAND chip timings
- */
-#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14
-#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666
-#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000
-#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000
-#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14
-#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666
-#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000
-#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000
-
-#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
-#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
-
-/*
- * USB
- */
-#define CONFIG_USB_OHCI_LPC32XX
-#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d
-
-/*
- * U-Boot General Configurations
- */
-#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-/*
- * Pass open firmware flat tree
- */
-
-/*
- * Environment
- */
-#define CONFIG_ENV_SIZE SZ_128K
-#define CONFIG_ENV_OFFSET 0x000A0000
-
-#define CONFIG_BOOTCOMMAND \
- "dhcp; " \
- "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \
- "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \
- "setenv nfsargs ip=dhcp root=/dev/nfs
nfsroot=${serverip}:${nfsroot},tcp; " \
- "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; "
\
- "bootm ${loadaddr} - ${dtbaddr}"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "autoload=no\0" \
- "ethaddr=00:01:90:00:C0:81\0" \
- "dtbaddr=0x81000000\0" \
- "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \
- "tftpdir=vladimir/oe/devkit3250\0" \
- "userargs=oops=panic\0"
-
-/*
- * U-Boot Commands
- */
-
-/*
- * Boot Linux
- */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-
-#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 0x80008000
-
-/*
- * SPL specific defines
- */
-/* SPL will be executed at offset 0 */
-#define CONFIG_SPL_TEXT_BASE 0x00000000
-
-/* SPL will use SRAM as stack */
-#define CONFIG_SPL_STACK 0x0000FFF8
-
-/* Use the framework and generic lib */
-
-/* SPL will use serial */
-
-/* SPL loads an image from NAND */
-#define CONFIG_SPL_NAND_RAW_ONLY
-#define CONFIG_SPL_NAND_DRIVERS
-
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SOFTECC
-
-#define CONFIG_SPL_MAX_SIZE 0x20000
-#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
-
-/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
-
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-
-/* See common/spl/spl.c spl_set_header_raw_uboot() */
-#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE
-
-/*
- * Include SoC specific configuration
- */
-#include <asm/arch/config.h>
-
-#endif /* __CONFIG_DEVKIT3250_H__*/
--
2.19.1.1215.g8438c0b245-goog
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