On Thu, 2018-11-29 at 12:28 +0100, Marek Vasut wrote: > On 11/29/2018 10:40 AM, chee.hong....@intel.com wrote: > > > > From: "Ang, Chee Hong" <chee.hong....@intel.com> > > > > Enable 'fpga' command in u-boot. User will be able to use the FPGA > > command to program the FPGA on Stratix10 SoC. > > > > Signed-off-by: Ang, Chee Hong <chee.hong....@intel.com> > > --- > > arch/arm/mach-socfpga/Makefile | 4 ++ > > arch/arm/mach-socfpga/fpga_device.c | 59 > > ++++++++++++++++++++++++ > > arch/arm/mach-socfpga/include/mach/fpga_device.h | 15 ++++++ > > arch/arm/mach-socfpga/include/mach/misc.h | 6 --- > > arch/arm/mach-socfpga/misc.c | 31 ------------ > > - > > arch/arm/mach-socfpga/misc_arria10.c | 1 + > > arch/arm/mach-socfpga/misc_gen5.c | 1 + > > arch/arm/mach-socfpga/misc_s10.c | 3 ++ > > drivers/fpga/altera.c | 6 +++ > > include/altera.h | 4 ++ > > 10 files changed, 93 insertions(+), 37 deletions(-) > > create mode 100644 arch/arm/mach-socfpga/fpga_device.c > > create mode 100644 arch/arm/mach- > > socfpga/include/mach/fpga_device.h > > > > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach- > > socfpga/Makefile > > index e667204..2ff1b3f 100644 > > --- a/arch/arm/mach-socfpga/Makefile > > +++ b/arch/arm/mach-socfpga/Makefile > > @@ -10,6 +10,10 @@ obj-y += clock_manager.o > > obj-y += misc.o > > obj-y += reset_manager.o > > > > +ifdef CONFIG_FPGA > > +obj-y += fpga_device.o > > +endif > > + > > ifdef CONFIG_TARGET_SOCFPGA_GEN5 > > obj-y += clock_manager_gen5.o > > obj-y += misc_gen5.o > > diff --git a/arch/arm/mach-socfpga/fpga_device.c b/arch/arm/mach- > > socfpga/fpga_device.c > > new file mode 100644 > > index 0000000..97b27eb > > --- /dev/null > > +++ b/arch/arm/mach-socfpga/fpga_device.c > > @@ -0,0 +1,59 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright (C) 2018 Intel Corporation <www.intel.com> > > + */ > > + > > +#include <common.h> > > +#include <altera.h> > > + > > +#ifdef CONFIG_FPGA_STRATIX10 > > +/* > > + * FPGA programming support for SoC FPGA Stratix 10 > > + */ > > +static Altera_desc altera_fpga[] = { > > + { > > + /* Family */ > > + Intel_FPGA_Stratix10, > > + /* Interface type */ > > + secure_device_manager_mailbox, > > + /* No limitation as additional data will be > > ignored */ > > + -1, > > + /* No device function table */ > > + NULL, > > + /* Base interface address specified in driver */ > > + NULL, > > + /* No cookie implementation */ > > + 0 > > + }, > > +}; > > +#else > > +/* > > + * FPGA programming support for SoC FPGA Cyclone V > > + */ > > +static Altera_desc altera_fpga[] = { > > + { > > + /* Family */ > > + Altera_SoCFPGA, > > + /* Interface type */ > > + fast_passive_parallel, > > + /* No limitation as additional data will be > > ignored */ > > + -1, > > + /* No device function table */ > > + NULL, > > + /* Base interface address specified in driver */ > > + NULL, > > + /* No cookie implementation */ > > + 0 > > + }, > > +}; > > +#endif > > + > > +/* add device descriptor to FPGA device table */ > > +void socfpga_fpga_add(void) > > +{ > > + int i; > > + > > + fpga_init(); > > + for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) > > + fpga_add(fpga_altera, &altera_fpga[i]); > Why do we need this loop if there's only one entry in the array ? This ensure we have support for future platforms which might have more than 1 FPGA devices on the platform.
> btw this function could stay in misc.c , the altera_fpga tables could > be > in misc_s10.c resp. something for Gen5 IMO, so you won't need another > new file. Yes. This will be addressed in v6 patchsets. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot