Finally found the issue, It was a ddr configuration issue after all, I
missed one value when copying the settings from our imximage.cfg to the
structures required for 'mx7_dram_cfg(...)'.
Should the register name "offset_lp_con0" in the ddr_phy structure not
be called "lp_con0" as it is called DDR_PHY_LP_CON0 in i.MX7 dual
application processor reference manual?
Regards,
Rens.
On 9-1-2019 18:31, Rens Dol wrote:
Hi all,
I am trying to get SPL working on a imx7 based board. I need to
configure the DDR voltage before u-boot can be loaded from NAND. I am
using the pico-imx7_defconfig as a starting point. It already has SPL
configured to initialize ddr.
From board_init_f I call spl_early_init() to initialize malloc_simple
so that I can use the pmic driver to set the DDR voltage and configure
DDR . So far everything is working as expected, I can write/read from
DDR.
But this is as far as SPL wants to go.. my guess is that switching
from malloc_simple in board_init_f() to the full malloc implementation
is not working.
- I use boundarydevices/imx_usb_loader to load u-boot-nand-spl.imx -
- git.denx.de/u-boot-imx version 2019.01-rc1 -
This what my debug output shows.
U-Boot SPL 2019.01-rc1-dirty (Jan 09 2019 - 16:07:51 +0100)
spl_early_init
power_init Set ddr regulator to 1.50V
-- mALLOc --
00000040
pmic_alloc: new pmic struct: 0x009467b0
pmic_get: pmic BD71815 -> 0x009467b0
Bus: 1 PMIC:BD71815 probed!
i2c_write_data: chip=0x4b, len=0x0
write_data:
i2c_read_data: chip=0x4b, len=0x1
0x41
PMIC: BD71815 DEV_ID=0x41
i2c_write_data: chip=0x4b, len=0x1
write_data: 0x10
setup drr controller!
Testing ram
>>SPL: board_init_r()
using memory 0x88300000-0x88400000 for malloc()
spl_init
spl_board_init
Trying to boot from NAND
spl: nand - using hw ecc
Trying to load image from CONFIG_SYS_NAND_U_BOOT_OFFS 400000 87800000
nand_spl_load_image
mxs_nand_init
-- mALLOc --
00000598
-- malloc_extend_top -- pagesz = 00001000
nb = 000005A0
top = 0091F010
-- sbrk
increment = 000005B0 returns = 88300000-- sbrk end
brk = 88300000
-- sbrk
increment = 00000A50 returns = 883005B0-- sbrk end
top = 88300000
old_top = 0091F010
old_top_size = 00000000
top_size = 00001000
MXS NAND: Failed to allocate private data.
Attached the spl/u-boot.cfg and pico-imx7d.h files.
Here are my questions.
- Has anyone tried this before on a imx7d?
- Do I have conflicting configuration options?
- Do I need to relocate the complete SPL from SRAM to DDR to make this
work?
- Should malloc be available in spl_board_init()?
By enabling CONFIG_SPL_SYS_MALLOC_SIMPLE it boots a little further,
but gets stuck in the nand driver after reading the onfi data and
searching for a bad block table.
Should it be possible to have usb + nand + i2c working using only
CONFIG_SPL_SYS_MALLOC_SIMPLE?
Met vriendelijke groeten
Kind regards,
Rens Dol
Software Engineer
Opticon Sensors Europe B.V.
Opaallaan 35
2132 XV HOOFDDORP
The Netherlands
Tel.+31(0)235692720
[email protected] 1
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--
Met vriendelijke groeten
Kind regards,
Rens Dol
Software Engineer
Opticon Sensors Europe B.V.
Opaallaan 35
2132 XV HOOFDDORP
The Netherlands
Tel.+31(0)235692720
[email protected]
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