> -----Original Message----- > From: Meenakshi Aggarwal <[email protected]> > Sent: Tuesday, February 19, 2019 12:09 AM > To: [email protected]; Prabhakar Kushwaha > <[email protected]>; York Sun <[email protected]> > Cc: Meenakshi Aggarwal <[email protected]>; Udit Kumar > <[email protected]> > Subject: [PATCH] L3 cache : arch : arm : lib : Flush L3 after relocation > > Flush L3 cache after uboot relocated to DDR. > > Signed-off-by: Meenakshi Aggarwal <[email protected]> > Signed-off-by: Udit Kumar <[email protected]> > --- > arch/arm/lib/relocate_64.S | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S index > 171d094..7603f52 100644 > --- a/arch/arm/lib/relocate_64.S > +++ b/arch/arm/lib/relocate_64.S > @@ -85,6 +85,7 @@ relocate_done: > isb sy > 4: ldp x0, x1, [sp, #16] > bl __asm_flush_dcache_range > + bl __asm_flush_l3_dcache
This change is happening for every arm platform. There can be platform not having l3 cache. How It is taken care? --pk _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
