On 19. 02. 19 4:47, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee <tien.fong.c...@intel.com> > > This patch adds description on properties about file name used for both > peripheral bitstream and core bitstream. > > Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com> > > --- > > changes for v8 > - Removed explanation about support for altr,bitstream-core > > changes for v7 > - Provided example of setting FPGA FIT image for both early IO release > and full release FPGA configuration. > --- > .../fpga/altera-socfpga-a10-fpga-mgr.txt | 26 > +++++++++++++++++++++- > 1 file changed, 25 insertions(+), 1 deletion(-) > > diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > index 2fd8e7a..da210bf 100644 > --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > @@ -7,8 +7,31 @@ Required properties: > - The second index is for writing FPGA configuration data. > - resets : Phandle and reset specifier for the device's reset. > - clocks : Clocks used by the device. > +- altr,bitstream : Fit image file name for both FPGA peripheral bitstream, > + FPGA core bitstream and full bitstream. >
By adding new required property you are automatically saying that you want to break all current users. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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