On 3/5/19 12:16 PM, Ismael Luceno Cortes wrote: Commit message is missing :(
> Signed-off-by: Ismael Luceno <[email protected]> > --- > > Notes: > Changes since v1: > - Rebased on top of patch 1050650 ("i2c: rcar_i2c: Add Gen3 SoC support") Thanks! > drivers/i2c/rcar_i2c.c | 45 +++++++++++++++++++++--------------------- > 1 file changed, 23 insertions(+), 22 deletions(-) > > diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c > index 74643b085e..c1a233b6e9 100644 > --- a/drivers/i2c/rcar_i2c.c > +++ b/drivers/i2c/rcar_i2c.c > @@ -18,35 +18,36 @@ > #include <asm/io.h> > #include <wait_bit.h> > > -#define RCAR_I2C_ICSCR 0x00 > -#define RCAR_I2C_ICMCR 0x04 > -#define RCAR_I2C_ICMCR_MDBS BIT(7) > -#define RCAR_I2C_ICMCR_FSCL BIT(6) > -#define RCAR_I2C_ICMCR_FSDA BIT(5) > -#define RCAR_I2C_ICMCR_OBPC BIT(4) > -#define RCAR_I2C_ICMCR_MIE BIT(3) > +#define RCAR_I2C_ICSCR 0x00 /* slave ctrl */ > +#define RCAR_I2C_ICMCR 0x04 /* master ctrl */ > +#define RCAR_I2C_ICMCR_MDBS BIT(7) /* non-fifo mode switch */ > +#define RCAR_I2C_ICMCR_FSCL BIT(6) /* override SCL pin */ > +#define RCAR_I2C_ICMCR_FSDA BIT(5) /* override SDA pin */ > +#define RCAR_I2C_ICMCR_OBPC BIT(4) /* override pins */ > +#define RCAR_I2C_ICMCR_MIE BIT(3) /* master if enable */ > #define RCAR_I2C_ICMCR_TSBE BIT(2) > -#define RCAR_I2C_ICMCR_FSB BIT(1) > -#define RCAR_I2C_ICMCR_ESG BIT(0) > -#define RCAR_I2C_ICSSR 0x08 > -#define RCAR_I2C_ICMSR 0x0c > +#define RCAR_I2C_ICMCR_FSB BIT(1) /* force stop bit */ > +#define RCAR_I2C_ICMCR_ESG BIT(0) /* enable start bit gen */ > +#define RCAR_I2C_ICSSR 0x08 /* slave status */ > +#define RCAR_I2C_ICMSR 0x0c /* master status */ > #define RCAR_I2C_ICMSR_MASK 0x7f > -#define RCAR_I2C_ICMSR_MNR BIT(6) > -#define RCAR_I2C_ICMSR_MAL BIT(5) > -#define RCAR_I2C_ICMSR_MST BIT(4) > +#define RCAR_I2C_ICMSR_MNR BIT(6) /* Nack */ > +#define RCAR_I2C_ICMSR_MAL BIT(5) /* Arbitration lost */ > +#define RCAR_I2C_ICMSR_MST BIT(4) /* Stop */ > #define RCAR_I2C_ICMSR_MDE BIT(3) > #define RCAR_I2C_ICMSR_MDT BIT(2) > #define RCAR_I2C_ICMSR_MDR BIT(1) > #define RCAR_I2C_ICMSR_MAT BIT(0) > -#define RCAR_I2C_ICSIER 0x10 > -#define RCAR_I2C_ICMIER 0x14 > -#define RCAR_I2C_ICCCR 0x18 > +#define RCAR_I2C_ICSIER 0x10 /* slave irq enable */ > +#define RCAR_I2C_ICMIER 0x14 /* master irq enable */ > +#define RCAR_I2C_ICCCR 0x18 /* clock dividers */ > #define RCAR_I2C_ICCCR_SCGD_OFF 3 > -#define RCAR_I2C_ICSAR 0x1c > -#define RCAR_I2C_ICMAR 0x20 > -#define RCAR_I2C_ICRXD_ICTXD 0x24 > -#define RCAR_I2C_ICFBSCR 0x38 > -#define RCAR_I2C_ICFBSCR_TCYC17 0x0f > +#define RCAR_I2C_ICSAR 0x1c /* slave address */ > +#define RCAR_I2C_ICMAR 0x20 /* master address */ > +#define RCAR_I2C_ICRXD_ICTXD 0x24 /* data port */ > +#define RCAR_I2C_ICFBSCR 0x38 /* First Bit Setup Cycle (Gen3) > */ > +#define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc delay 1st bit > + between SDA and SCL */ > > enum rcar_i2c_type { > RCAR_I2C_TYPE_GEN2, Checkpatch is complaining: WARNING: line over 80 characters #137: FILE: drivers/i2c/rcar_i2c.c:47: +#define RCAR_I2C_ICFBSCR 0x38 /* First Bit Setup Cycle (Gen3) */ WARNING: Block comments use * on subsequent lines #139: FILE: drivers/i2c/rcar_i2c.c:49: +#define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc delay 1st bit + between SDA and SCL */ WARNING: Block comments use a trailing */ on a separate line #139: FILE: drivers/i2c/rcar_i2c.c:49: + between SDA and SCL */ total: 1 errors, 3 warnings, 0 checks, 60 lines checked Please fix and run scripts/checkpatch.pl on the patches before posting them. -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
