From: Laurentiu Tudor <laurentiu.tu...@nxp.com>
Add defines for all the SEC job rings base addresses.
Signed-off-by: Laurentiu Tudor <laurentiu.tu...@nxp.com>
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 9fab88ab2f..fc14fb6fe0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -89,10 +89,18 @@
/* SEC */
#define CONFIG_SYS_FSL_SEC_OFFSET 0x07000000ull
#define CONFIG_SYS_FSL_JR0_OFFSET 0x07010000ull
+#define FSL_SEC_JR0_OFFSET CONFIG_SYS_FSL_JR0_OFFSET
+#define FSL_SEC_JR1_OFFSET 0x07020000ull
+#define FSL_SEC_JR2_OFFSET 0x07030000ull
+#define FSL_SEC_JR3_OFFSET 0x07040000ull
#define CONFIG_SYS_FSL_SEC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
#define CONFIG_SYS_FSL_JR0_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
+#define FSL_SEC_JR0_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR0_OFFSET)
+#define FSL_SEC_JR1_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR1_OFFSET)
+#define FSL_SEC_JR2_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR2_OFFSET)
+#define FSL_SEC_JR3_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR3_OFFSET)
#ifdef CONFIG_TFABOOT
#ifdef CONFIG_NXP_LSCH3_2
--
2.17.1
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