Hi,jagan Thank you for your replay!
> -----Original Message----- > From: Jagan Teki <[email protected]> > Sent: 2019年4月24日 14:57 > To: Chuanhua Han <[email protected]> > Cc: Jagan Teki <[email protected]>; Wolfgang Denk <[email protected]>; > Shengzhou Liu <[email protected]>; Ruchika Gupta > <[email protected]>; U-Boot-Denx <[email protected]>; Jiafei Pan > <[email protected]>; Yinbo Zhu <[email protected]> > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver > to driver model > > WARNING: This email was created outside of NXP. DO NOT CLICK links or > attachments unless you recognize the sender and know the content is safe. > > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han <[email protected]> > wrote: > > > > Modify the Freescale ESPI driver to support the driver model. > > Also resolved the following problems: > > > > ===================== WARNING ====================== This board > does > > not use CONFIG_DM_SPI. Please update the board before v2019.04 for no > > dm conversion and v2019.07 for partially dm converted drivers. > > Failure to update can lead to driver/board removal See > > doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > ===================== WARNING ====================== This board > does > > not use CONFIG_DM_SPI_FLASH. Please update the board to use > > CONFIG_SPI_FLASH before the v2019.07 release. > > Failure to update by the deadline may result in board removal. > > See doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > > > Signed-off-by: Chuanhua Han <[email protected]> > > --- > > depends on: > > - > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc > > > hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d > ata > > > =02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8 > 8223e3%7 > > > C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371 > 5&sda > > > ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve > d=0 > > > > drivers/spi/fsl_espi.c | 450 > > +++++++++++++++++++++++++++++------------ > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index > > 7444ae1a06..6ebe57c30b 100644 > > --- a/drivers/spi/fsl_espi.c > > +++ b/drivers/spi/fsl_espi.c > > @@ -4,17 +4,27 @@ > > * > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > * Author: Mingkai Hu ([email protected]) > > + * Chuanhua Han ([email protected]) > > */ > > > > #include <common.h> > > - > > #include <malloc.h> > > #include <spi.h> > > #include <asm/immap_85xx.h> > > +#include <dm.h> > > +#include <errno.h> > > +#include <fdtdec.h> > > + > > +struct fsl_espi_platdata { > > + uint flags; > > + uint speed_hz; > > + uint num_chipselect; > > + fdt_addr_t regs_addr; > > +}; > > > > -struct fsl_spi_slave { > > - struct spi_slave slave; > > +struct fsl_espi_priv { > > ccsr_espi_t *espi; > > + u32 speed_hz; > > unsigned int div16; > > unsigned int pm; > > int tx_timeout; > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > unsigned int max_transfer_length; > > }; > > > > +struct fsl_spi_slave { > > + struct spi_slave slave; > > + struct fsl_espi_priv priv; > > +}; > > + > > #define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, > > slave) > > +#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, > > +priv) > > #define US_PER_SECOND 1000000UL > > > > +/* default SCK frequency, unit: HZ */ > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > + > > #define ESPI_MAX_CS_NUM 4 > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, > > - unsigned int max_hz, unsigned int mode) > > -{ > > - struct fsl_spi_slave *fsl; > > - sys_info_t sysinfo; > > - unsigned long spibrg = 0; > > - unsigned long spi_freq = 0; > > - unsigned char pm = 0; > > - > > - if (!spi_cs_is_valid(bus, cs)) > > - return NULL; > > - > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > - if (!fsl) > > - return NULL; > > - > > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > > - fsl->mode = mode; > > - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; > > - > > - /* Set eSPI BRG clock source */ > > - get_sys_info(&sysinfo); > > - spibrg = sysinfo.freq_systembus / 2; > > - fsl->div16 = 0; > > - if ((spibrg / max_hz) > 32) { > > - fsl->div16 = ESPI_CSMODE_DIV16; > > - pm = spibrg / (max_hz * 16 * 2); > > - if (pm > 16) { > > - pm = 16; > > - debug("Requested speed is too low: %d Hz, %ld > Hz " > > - "is used.\n", max_hz, spibrg / (32 * 16)); > > - } > > - } else > > - pm = spibrg / (max_hz * 2); > > - if (pm) > > - pm--; > > - fsl->pm = pm; > > - > > - if (fsl->div16) > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > - else > > - spi_freq = spibrg / ((pm + 1) * 2); > > - > > - /* set tx_timeout to 10 times of one espi FIFO entry go out */ > > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > ESPI_FIFO_WIDTH_BIT > > - * 10), spi_freq); > > - > > - return &fsl->slave; > > -} > > - > > -void spi_free_slave(struct spi_slave *slave) > > +#ifndef CONFIG_DM_SPI > > Would you try for full dm-conversion? it would be hard to move all respective > defconfigs to use but better try since we have next version deadline for full > dm-conversion. thanks! Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you. _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
