From: "Ang, Chee Hong" <[email protected]>

Software must never reset FPGA2SOC bridge. This bridge must only be
reset by POR/COLD/WARM reset. Asserting the FPGA2SOC reset by software
can cause the SoC to lock-up if there are traffics being drived into
FPGA2SOC bridge.

Signed-off-by: Ang, Chee Hong <[email protected]>
---
 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 2 ++
 arch/arm/mach-socfpga/reset_manager_s10.c              | 7 ++++---
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
index 3ac46c3..aef965e 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
@@ -48,6 +48,8 @@ struct socfpga_reset_manager {
 #define RSTMGR_MPUMODRST_CORE0         0
 #define RSTMGR_PER0MODRST_OCP_MASK     0x0020bf00
 #define RSTMGR_BRGMODRST_DDRSCH_MASK   0X00000040
+#define RSTMGR_BRGMODRST_FPGA2SOC_MASK 0x00000004
+
 /* Watchdogs and MPU warm reset mask */
 #define RSTMGR_L4WD_MPU_WARMRESET_MASK 0x000F0F00
 
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c 
b/arch/arm/mach-socfpga/reset_manager_s10.c
index f8dd787..39753a1 100644
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -61,7 +61,7 @@ void socfpga_bridges_reset(int enable)
                /* clear idle request to all bridges */
                setbits_le32(&system_manager_base->noc_idlereq_clr, ~0);
 
-               /* Release bridges from reset state per handoff value */
+               /* Release all bridges from reset state */
                clrbits_le32(&reset_manager_base->brgmodrst, ~0);
 
                /* Poll until all idleack to 0 */
@@ -84,9 +84,10 @@ void socfpga_bridges_reset(int enable)
                        (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK)))
                        ;
 
-               /* Put all bridges (except NOR DDR scheduler) into reset */
+               /* Reset all bridges (except NOR DDR scheduler & F2S) */
                setbits_le32(&reset_manager_base->brgmodrst,
-                            ~RSTMGR_BRGMODRST_DDRSCH_MASK);
+                            ~(RSTMGR_BRGMODRST_DDRSCH_MASK |
+                            RSTMGR_BRGMODRST_FPGA2SOC_MASK));
 
                /* Disable NOC timeout */
                writel(0, &system_manager_base->noc_timeout);
-- 
2.7.4

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