Heiko,
On 04/05/2019 04:30 PM, Heiko Stuebner wrote:
> ATF resides in the first 2MB of ram and will also protect this
> area from non-secure access.
>
> So similar to other Rockchip socs keep this area from the usable ram.
>
> Signed-off-by: Heiko Stuebner <he...@sntech.de>
> ---
> arch/arm/mach-rockchip/rk3288/rk3288.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c
> b/arch/arm/mach-rockchip/rk3288/rk3288.c
> index a725abc5a5..678ab0de65 100644
> --- a/arch/arm/mach-rockchip/rk3288/rk3288.c
> +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
> @@ -2,11 +2,27 @@
> /*
> * Copyright (c) 2016 Rockchip Electronics Co., Ltd
> */
> +#include <common.h>
> #include <asm/io.h>
> #include <asm/arch/hardware.h>
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> #define GRF_SOC_CON2 0xff77024c
>
> +int dram_init_banksize(void)
This break the build for vyasa-rk3288 board:
arm: + vyasa-rk3288+spl/arch/arm/mach-rockchip/rk3288-board-spl.o: In
function
`dram_init_banksize':+arch/arm/mach-rockchip/rk3288-board-spl.c:208:
multiple definition of
`dram_init_banksize'+spl/arch/arm/mach-rockchip/rk3288/built-in.o:arch/arm/mach-rockchip/rk3288/rk3288.c:25:
first defined here
Thanks,
- Kever
> +{
> +#ifdef CONFIG_SPL_ATF
> + size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
> +
> + /* Reserve 0x200000 for ATF bl32 */
> + gd->bd->bi_dram[0].start = 0x0200000;
> + gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
> +#endif
> +
> + return 0;
> +}
> +
> int arch_cpu_init(void)
> {
> /* We do some SoC one time setting here. */
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