Add other serdes protocal support.
Signed-off-by: Xiaowei Bao <[email protected]>
---
arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 13 +++++++++++++
.../include/asm/arch-fsl-layerscape/fsl_serdes.h | 12 ++++++++++++
2 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
index ef598c4..5835a3a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
@@ -22,6 +22,19 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0xEBCC, {PCIE1, PCIE1, PCIE2, SATA1} },
{0xCCCC, {PCIE1, PCIE1, PCIE2, PCIE2} },
{0xDDDD, {PCIE1, PCIE1, PCIE1, PCIE1} },
+ {0xE031, {SXGMII1, QXGMII2, NONE, SATA1} },
+ {0xB991, {SXGMII1, SGMII1, SGMII2, PCIE1} },
+ {0xBB31, {SXGMII1, QXGMII2, PCIE1, PCIE1} },
+ {0xCC31, {SXGMII1, QXGMII2, PCIE2, PCIE2} },
+ {0xBB51, {SXGMII1, QSGMII_B, PCIE2, PCIE1} },
+ {0xBB38, {SGMII_T1, QXGMII2, PCIE2, PCIE1} },
+ {0xCC38, {SGMII_T1, QXGMII2, PCIE2, PCIE2} },
+ {0xBB58, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} },
+ {0xCC58, {SGMII_T1, QSGMII_B, PCIE2, PCIE2} },
+ {0xCC8B, {PCIE1, SGMII_T1, PCIE2, PCIE2} },
+ {0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} },
+ {0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} },
+ {0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} },
{}
};
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
index 68354ff..8f43651 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
@@ -64,6 +64,18 @@ enum srds_prtcl {
QSGMII_B,
QSGMII_C,
QSGMII_D,
+ SGMII_T1,
+ SGMII_T2,
+ SGMII_T3,
+ SGMII_T4,
+ SXGMII1,
+ SXGMII2,
+ SXGMII3,
+ SXGMII4,
+ QXGMII1,
+ QXGMII2,
+ QXGMII3,
+ QXGMII4,
_25GE1,
_25GE2,
_25GE3,
--
1.7.1
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