On 05/07/2019 04:49 PM, Christoph Muellner wrote:
> This is a partial revert of commit 0a09f2f1173d
> ("rockchip: Adjust rk3399 device tree to be closer to linux").
>
> Harmonizing the rk3399.dtsi with the one from Linux is a good idea.
> However, this is only true if the information within that file can be
> used by U-Boot. Before the named commit USB3 was working fine, after the
> commit USB3 was broken on all RK3399 boards.
>
> This commit reverts the USB3 changes to the original ones, which provide
> the required information for the corresponding drivers in the U-Boot tree.
>
> Signed-off-by: Christoph Muellner <[email protected]>
Yes, USB dts node is different from Linux now, and I thinks there are
patches
on the list are still working on sync with Linux, we have to make it
work first
before sync everything with Linux.Reviewed-by: Kever Yang <[email protected]> Thanks, - Kever > --- > > arch/arm/dts/rk3399.dtsi | 88 > ++++++++++++++++++------------------------------ > 1 file changed, 32 insertions(+), 56 deletions(-) > > diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi > index b53e41b4dc..823d459957 100644 > --- a/arch/arm/dts/rk3399.dtsi > +++ b/arch/arm/dts/rk3399.dtsi > @@ -349,69 +349,45 @@ > status = "disabled"; > }; > > - usbdrd3_0: dwc3_typec0: usb@fe800000 { > - compatible = "rockchip,rk3399-dwc3"; > - #address-cells = <2>; > - #size-cells = <2>; > - ranges; > - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, > - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, > - <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; > - clock-names = "ref_clk", "suspend_clk", > - "bus_clk", "aclk_usb3_rksoc_axi_perf", > - "aclk_usb3", "grf_clk"; > - resets = <&cru SRST_A_USB3_OTG0>; > - reset-names = "usb3-otg"; > + dwc3_typec0: usb@fe800000 { > + compatible = "rockchip,rk3399-xhci"; > + reg = <0x0 0xfe800000 0x0 0x100000>; > status = "disabled"; > + snps,dis-enblslpm-quirk; > + snps,phyif-utmi-bits = <16>; > + snps,dis-u2-freeclk-exists-quirk; > + snps,dis-u2-susphy-quirk; > > - usbdrd_dwc3_0: dwc3 { > - compatible = "snps,dwc3"; > - reg = <0x0 0xfe800000 0x0 0x100000>; > - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>; > - dr_mode = "otg"; > - phys = <&u2phy0_otg>, <&tcphy0_usb3>; > - phy-names = "usb2-phy", "usb3-phy"; > - phy_type = "utmi_wide"; > - snps,dis_enblslpm_quirk; > - snps,dis-u2-freeclk-exists-quirk; > - snps,dis_u2_susphy_quirk; > - snps,dis-del-phy-power-chg-quirk; > - snps,dis-tx-ipgap-linecheck-quirk; > - power-domains = <&power RK3399_PD_USB3>; > - status = "disabled"; > + #address-cells = <2>; > + #size-cells = <2>; > + hub { > + compatible = "usb-hub"; > + usb,device-class = <USB_CLASS_HUB>; > + }; > + typec_phy0 { > + compatible = "rockchip,rk3399-usb3-phy"; > + reg = <0x0 0xff7c0000 0x0 0x40000>; > }; > }; > > - dwc3_typec1: usbdrd3_1: usb@fe900000 { > - compatible = "rockchip,rk3399-dwc3"; > - #address-cells = <2>; > - #size-cells = <2>; > - ranges; > - clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>, > - <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, > - <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; > - clock-names = "ref_clk", "suspend_clk", > - "bus_clk", "aclk_usb3_rksoc_axi_perf", > - "aclk_usb3", "grf_clk"; > - resets = <&cru SRST_A_USB3_OTG1>; > - reset-names = "usb3-otg"; > + dwc3_typec1: usb@fe900000 { > + compatible = "rockchip,rk3399-xhci"; > + reg = <0x0 0xfe900000 0x0 0x100000>; > status = "disabled"; > + snps,dis-enblslpm-quirk; > + snps,phyif-utmi-bits = <16>; > + snps,dis-u2-freeclk-exists-quirk; > + snps,dis-u2-susphy-quirk; > > - usbdrd_dwc3_1: dwc3 { > - compatible = "snps,dwc3"; > - reg = <0x0 0xfe900000 0x0 0x100000>; > - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>; > - dr_mode = "otg"; > - phys = <&u2phy1_otg>, <&tcphy1_usb3>; > - phy-names = "usb2-phy", "usb3-phy"; > - phy_type = "utmi_wide"; > - snps,dis_enblslpm_quirk; > - snps,dis-u2-freeclk-exists-quirk; > - snps,dis_u2_susphy_quirk; > - snps,dis-del-phy-power-chg-quirk; > - snps,dis-tx-ipgap-linecheck-quirk; > - power-domains = <&power RK3399_PD_USB3>; > - status = "disabled"; > + #address-cells = <2>; > + #size-cells = <2>; > + hub { > + compatible = "usb-hub"; > + usb,device-class = <USB_CLASS_HUB>; > + }; > + typec_phy1 { > + compatible = "rockchip,rk3399-usb3-phy"; > + reg = <0x0 0xff800000 0x0 0x40000>; > }; > }; > _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
