Update qspi clock configuration in TFABOOT in case
of all boot sources except qspi boot source.
Signed-off-by: Pankit Garg <pankit.g...@nxp.com>
---
Changes for v2:
- change subject line of commit-id
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index df3200e..aeaf7b8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -609,6 +609,9 @@ void fsl_lsch2_early_init_f(void)
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
CONFIG_SYS_CCI400_OFFSET);
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
+#ifdef CONFIG_TFABOOT
+ enum boot_src src;
+#endif
#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
@@ -618,9 +621,15 @@ void fsl_lsch2_early_init_f(void)
init_early_memctl_regs(); /* tighten IFC timing */
#endif
+#if defined(CONFIG_FSL_QSPI) && defined(CONFIG_TFABOOT)
+ src = get_boot_src();
+ if (src != BOOT_SOURCE_QSPI_NOR)
+ out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
+#else
#if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
#endif
+#endif
/* Make SEC reads and writes snoopable */
setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
SCFG_SNPCNFGCR_SECWRSNP |
--
1.9.1
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