We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.

Signed-off-by: Kever Yang <[email protected]>
---

 arch/arm/mach-rockchip/Makefile       | 6 ------
 arch/arm/mach-rockchip/rk3128-board.c | 3 ---
 include/configs/rk3128_common.h       | 7 ++++---
 3 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 3e3aa1c421..9afbb055d5 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -41,12 +41,6 @@ endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
-ifndef CONFIG_ARM64
-ifeq 
($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036)$(CONFIG_ROCKCHIP_RK3288),)
-obj-y += rk_timer.o
-endif
-endif
-
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
 ifndef CONFIG_TPL_BUILD
diff --git a/arch/arm/mach-rockchip/rk3128-board.c 
b/arch/arm/mach-rockchip/rk3128-board.c
index fa71685af8..0945829d0e 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -12,7 +12,6 @@
 #include <asm/arch-rockchip/periph.h>
 #include <asm/arch-rockchip/grf_rk3128.h>
 #include <asm/arch-rockchip/boot_mode.h>
-#include <asm/arch-rockchip/timer.h>
 #include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -33,8 +32,6 @@ int board_init(void)
 {
        int ret = 0;
 
-       rockchip_timer_init();
-
        ret = regulators_enable_boot_on(false);
        if (ret) {
                debug("%s: Cannot enable boot on regulator\n", __func__);
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 0c08d7af5b..20d62439fb 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -14,9 +14,10 @@
 #define CONFIG_SYS_CBSIZE              1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE          (24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE          0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
+#define CONFIG_ROCKCHIP_STIMER_BASE    0x200440a0
+#define COUNTER_FREQUENCY              24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK            24000000
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x60100000
 #define CONFIG_SYS_LOAD_ADDR           0x60800800
-- 
2.17.1

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