On Wed, Jul 24, 2019 at 9:31 AM Marek Vasut <[email protected]> wrote: > > On 7/23/19 10:27 PM, Simon Goldschmidt wrote: > > To use this timer on socfpga as system tick, it needs to take itself out > > of reset. > > > > Signed-off-by: Simon Goldschmidt <[email protected]> > > --- > > > > drivers/timer/dw-apb-timer.c | 18 +++++++++++++++++- > > 1 file changed, 17 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c > > index 86312b8dc7..fad22be8c9 100644 > > --- a/drivers/timer/dw-apb-timer.c > > +++ b/drivers/timer/dw-apb-timer.c > > @@ -8,6 +8,7 @@ > > #include <common.h> > > #include <dm.h> > > #include <clk.h> > > +#include <reset.h> > > #include <timer.h> > > > > #include <asm/io.h> > > @@ -18,7 +19,8 @@ > > #define DW_APB_CTRL 0x8 > > > > struct dw_apb_timer_priv { > > - fdt_addr_t regs; > > + fdt_addr_t regs; > > + struct reset_ctl_bulk resets; > > }; > > > > static int dw_apb_timer_get_count(struct udevice *dev, u64 *count) > > @@ -42,6 +44,12 @@ static int dw_apb_timer_probe(struct udevice *dev) > > struct clk clk; > > int ret; > > > > + ret = reset_get_bulk(dev, &priv->resets); > > + if (ret) > > + dev_warn(dev, "Can't get reset: %d\n", ret); > > Shouldn't this be printed by the subsystem ?
I don't think it's printed by the subsystem. Plus I don't know if it's a warning for all drivers? I also haven't really thought about that, as I just copied the reset handling code from another driver... Regards, Simon _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
