On 19.08.19 11:42, Peng Fan wrote:
> The loader for the DDR firmware in drivers/ddr/imx/imx8m/helper.c uses a
> 4-byte-aligned address to load the firmware. In cases where OF is
> enabled in SPL the dtb will be appended to the SPL binary and can result
> in a binary that is not aligned correctly. If OF is not enabled in SPL,
> `_end` is already aligned correctly, but this patch does not hurt.
> 
> To ensure the correct alignment we use dd to create a temporary file
> u-boot-spl-pad.bin with the correct padding.
> 
> Reviewed-by: Frieder Schrempf <frieder.schrempf at kontron.de>

I think the " at " in my e-mail address should be "@" here and in all 
other patches/tags.

> Tested-by: Frieder Schrempf <frieder.schrempf at kontron.de>
> Signed-off-by: Peng Fan <peng....@nxp.com>
> ---
>   tools/imx8m_image.sh | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/imx8m_image.sh b/tools/imx8m_image.sh
> index ec0881a128..08a6a48180 100755
> --- a/tools/imx8m_image.sh
> +++ b/tools/imx8m_image.sh
> @@ -35,8 +35,9 @@ if [ $post_process = 1 ]; then
>               objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 
> $srctree/lpddr4_pmu_train_2d_imem.bin lpddr4_pmu_train_2d_imem_pad.bin
>               cat lpddr4_pmu_train_1d_imem_pad.bin 
> lpddr4_pmu_train_1d_dmem_pad.bin > lpddr4_pmu_train_1d_fw.bin
>               cat lpddr4_pmu_train_2d_imem_pad.bin 
> $srctree/lpddr4_pmu_train_2d_dmem.bin > lpddr4_pmu_train_2d_fw.bin
> -             cat spl/u-boot-spl.bin lpddr4_pmu_train_1d_fw.bin 
> lpddr4_pmu_train_2d_fw.bin > spl/u-boot-spl-ddr.bin
> -             rm -f lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin 
> lpddr4_pmu_train_1d_imem_pad.bin lpddr4_pmu_train_1d_dmem_pad.bin 
> lpddr4_pmu_train_2d_imem_pad.bin
> +             dd if=spl/u-boot-spl.bin of=spl/u-boot-spl-pad.bin bs=4 
> conv=sync
> +             cat spl/u-boot-spl-pad.bin lpddr4_pmu_train_1d_fw.bin 
> lpddr4_pmu_train_2d_fw.bin > spl/u-boot-spl-ddr.bin
> +             rm -f lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin 
> lpddr4_pmu_train_1d_imem_pad.bin lpddr4_pmu_train_1d_dmem_pad.bin 
> lpddr4_pmu_train_2d_imem_pad.bin spl/u-boot-spl-pad.bin
>       fi
>   fi
>   
> 
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