>-----Original Message----- >From: U-Boot <u-boot-boun...@lists.denx.de> On Behalf Of Biwen Li >Sent: Monday, September 16, 2019 1:31 PM >To: albert.u.b...@aribaud.net; Ran Wang <ran.wan...@nxp.com>; York Sun ><york....@nxp.com> >Cc: u-boot@lists.denx.de >Subject: [U-Boot] armv7: ls102xa: Fix endianness of SCFG_SPARECR8 Fix endianness means fixing endianness but here you are correcting it May be subject can be updated to something like "armv7: ls102xa: Update endianness of SCFG_SPARECR8 read" > >The patch fixes endianness of SCFG_SPARECR8 register Please update description to something like "Correct endianness of SCFG_SPARECR8 register read in_le32 -> in_be32"
--priyankajain > >Signed-off-by: Biwen Li <biwen...@nxp.com> >--- > arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > >diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >index bb169aaaf4..00b6ad48ce 100644 >--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c >@@ -72,7 +72,7 @@ static void __secure ls1_deepsleep_irq_cfg(void) > * returns zero, so its value is saved to a scrachpad register to be > * read, that is why we don't read it from register ippdexpcr1 itself. > */ >- ippdexpcr1 = in_le32(&scfg->sparecr[7]); >+ ippdexpcr1 = in_be32(&scfg->sparecr[7]); > out_be32(&rcpm->ippdexpcr1, ippdexpcr1); > > if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) >-- >2.17.1 > >_______________________________________________ >U-Boot mailing list >U-Boot@lists.denx.de >https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.de >nx.de%2Flistinfo%2Fu- >boot&data=02%7C01%7Cpriyanka.jain%40nxp.com%7C4a06ae27c20740 >32621608d73a802f63%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7 >C637042194542343559&sdata=j8WqmS7vao4EZkyG3CMianeO1M%2Fk5 >gsFVUpBNQoMgUM%3D&reserved=0 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot