J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node for the
same.

Signed-off-by: Vignesh Raghavendra <vigne...@ti.com>
---
 arch/arm/dts/k3-j721e-som-p0.dtsi | 34 +++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi 
b/arch/arm/dts/k3-j721e-som-p0.dtsi
index 1884fc70148f..1e1519f1c900 100644
--- a/arch/arm/dts/k3-j721e-som-p0.dtsi
+++ b/arch/arm/dts/k3-j721e-som-p0.dtsi
@@ -27,3 +27,37 @@
                };
        };
 };
+
+&wkup_pmx0 {
+       mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20) 
MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */
+                       J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C21) 
MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */
+                       J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (F19) 
MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */
+                       J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* (E22) 
MCU_OSPI1_CSn1.MCU_HYPERBUS0_CSn1 */
+                       J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (E19) 
MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */
+                       J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (D21) 
MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */
+                       J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D20) 
MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */
+                       J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (G19) 
MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */
+                       J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (G20) 
MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */
+                       J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (F20) 
MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */
+                       J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (F21) 
MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */
+                       J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (E21) 
MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
+                       J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (B22) 
MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
+                       J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) 
MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
+               >;
+       };
+};
+
+&hbmc {
+       status = "disabled";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
+       ranges = <0x0 0x0 0x5 0x0 0x4000000>, /* 64MB Flash on CS0 */
+                <0x1 0x0 0x5 0x4000000 0x800000>; /* 8MB RAM on CS1 */
+
+       flash@0,0 {
+               compatible = "cypress,hyperflash", "cfi-flash";
+               reg = <0x0 0x0 0x4000000>;
+       };
+};
-- 
2.23.0

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