The L1 regions of Core B are not directly accessible from Core A, so we
need to use DMA to get at them.

Signed-off-by: Mike Frysinger <[email protected]>
---
 arch/blackfin/include/asm/blackfin_local.h |   10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/arch/blackfin/include/asm/blackfin_local.h 
b/arch/blackfin/include/asm/blackfin_local.h
index 3fd34b3..48f793a 100644
--- a/arch/blackfin/include/asm/blackfin_local.h
+++ b/arch/blackfin/include/asm/blackfin_local.h
@@ -75,7 +75,15 @@ extern void blackfin_dcache_flush_invalidate_range(const 
void *, const void *);
  * regions can only be accessed via DMA, so if the address in question is in
  * that region, make sure we attempt to DMA indirectly.
  */
-# define addr_bfin_on_chip_mem(addr) (((unsigned long)(addr) & 0xFFF00000) == 
0xFFA00000)
+# ifdef __ADSPBF561__
+  /* Core B regions all need dma from Core A */
+#  define addr_bfin_on_chip_mem(addr) \
+       ((((unsigned long)(addr) & 0xFFF00000) == 0xFFA00000) || \
+        (((unsigned long)(addr) & 0xFFC00000) == 0xFF400000))
+# else
+#  define addr_bfin_on_chip_mem(addr) \
+       (((unsigned long)(addr) & 0xFFF00000) == 0xFFA00000)
+# endif
 
 # include <asm/system.h>
 
-- 
1.7.1.1

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