Hi Andy,

On Mon, 21 Oct 2019 at 01:52, Andy Shevchenko <andy.shevche...@gmail.com> wrote:
>
> On Mon, Oct 21, 2019 at 7:24 AM Simon Glass <s...@chromium.org> wrote:
> >
> > In TPL we try to minimise code size so do not include the PCI subsystem.
> > We can use fixed BARs and drivers can directly program the devices that
> > they need.
> >
> > However we do need to bind the devices on the PCI bus and without PCI this
> > does not ordinarily happen. As a work-around, define a fake PCI bus which
> > does this binding, but no other PCI operations. This is a convenient way
> > to ensure that we can use the same device tree for TPL, SPL and U-Boot
> > proper:
> >
> >    TPL    - CONFIG_TPL_PCI is not set (no auto-config, fake PCI bus)
> >    SPL    - CONFIG_SPL_PCI is set (no auto-config but with real PCI bus)
> >    U-Boot - CONFIG_PCI is set (full auto-config after relocation)
>
> PCI(e) bus is present in a lot of SoCs (not exclusively x86). Perhaps
> better idea is to have something like lib/pci.c with minimum support
> for PCI type 1 and probably PCI type 2 accessors and other very basic
> functions.

I don't know of any use case for PCI in TPL on other platforms.

x86 is I think unique in that it requires PCI to do anything. For
other platforms I am familiar with they can boot a fair way without
it.

I do want to avoid the premature-optimisation problem, i.e. inventing
new use cases that no one uses. The only thing we really know right
now is that we need this for newer x86 platforms.

Regards,
Simon
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