> -----Original Message----- > From: Marek Vasut <[email protected]> > Sent: Thursday, November 21, 2019 5:36 AM > To: [email protected] > Cc: Marek Vasut <[email protected]>; See, Chin Liang > <[email protected]>; Dalon Westergreen <[email protected]>; > Dinh Nguyen <[email protected]>; Tan, Ley Foon > <[email protected]>; Simon Goldschmidt > <[email protected]>; Chee, Tien Fong > <[email protected]> > Subject: [PATCH] ARM: socfpga: Unreset NAND in SPL on Gen5 > > In case the SPL on Gen5 loads U-Boot from NAND, unreset the NAND IP > explicitly in the platform code as the denali-spl driver is not aware of DM at > all. > > Signed-off-by: Marek Vasut <[email protected]> > Cc: Chin Liang See <[email protected]> > Cc: Dalon Westergreen <[email protected]> > Cc: Dinh Nguyen <[email protected]> > Cc: Ley Foon Tan <[email protected]> > Cc: Simon Goldschmidt <[email protected]> > Cc: Tien Fong Chee <[email protected]> > --- > arch/arm/mach-socfpga/spl_gen5.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach- > socfpga/spl_gen5.c > index 47e63709ad..408e409375 100644 > --- a/arch/arm/mach-socfpga/spl_gen5.c > +++ b/arch/arm/mach-socfpga/spl_gen5.c > @@ -138,6 +138,13 @@ void board_init_f(ulong dummy) > if (ret) > debug("Reset init failed: %d\n", ret); > > +#ifdef CONFIG_SPL_NAND_DENALI > + struct socfpga_reset_manager *reset_manager_base = > + (struct socfpga_reset_manager > *)SOCFPGA_RSTMGR_ADDRESS; > + > + clrbits_le32(&reset_manager_base->per_mod_reset, BIT(4)); #endif > + Normal Denali Nand driver (denali_dt_probe()) is not running in SPL Gen5? I am enabling NAND for Agilex recently, but didn't notice need to de-assert NAND reset outside of denali nand driver.
Regards Ley Foon _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
