> -----Original Message-----
> From: Marek Vasut <[email protected]>
> Sent: Thursday, November 21, 2019 5:37 AM
> To: [email protected]
> Cc: Marek Vasut <[email protected]>; See, Chin Liang
> <[email protected]>; Dalon Westergreen <[email protected]>;
> Dinh Nguyen <[email protected]>; Tan, Ley Foon
> <[email protected]>; Simon Goldschmidt
> <[email protected]>; Chee, Tien Fong
> <[email protected]>
> Subject: [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
> 
> The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
> between each SPL image. Generate U-Boot image with such a padding using
> this new target.
> 
> Signed-off-by: Marek Vasut <[email protected]>
> Cc: Chin Liang See <[email protected]>
> Cc: Dalon Westergreen <[email protected]>
> Cc: Dinh Nguyen <[email protected]>
> Cc: Ley Foon Tan <[email protected]>
> Cc: Simon Goldschmidt <[email protected]>
> Cc: Tien Fong Chee <[email protected]>

Reviewed-by: Ley Foon Tan <[email protected]>

Regards
Ley Foon
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