On 11/26/19 7:18 PM, Vladimir Olovyannikov wrote:
[...]
> +     /* Enable AXI read and write attributes. */
> +     clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIWRA),

Here is another extra parenthesis ;-)

> +                     (USBAXIWR_UA_MASK | USBAXIWR_SA_MASK),
> +                     (USBAXIWR_UA_VAL | USBAXIWR_SA_VAL));
> +     clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIRDA),
> +                     (USBAXIRD_UA_MASK | USBAXIRD_SA_MASK),
> +                     (USBAXIRD_UA_VAL | USBAXIRD_SA_VAL));

There is a lot of them ^ Please fix those, otherwise it's good.

[..]
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