On Tue, Dec 10, 2019 at 09:05:59AM +0800, ub...@andestech.com wrote: > Hi Tom, > > Please pull some riscv updates: > > - Increase stack size to avoid a stack overflow during distro boot. > - Add hifive-unleashed-a00.dts for SIFIVE FU540. > - Add OF_SEPARATE support for SIFIVE FU540. > - Add SPL support for Andes AX25 AE350. > - Improve U-Boot SPL / OpenSBI smp boot flow for RISC-V. > > https://travis-ci.org/rickchen36/u-boot-riscv/builds/622462488 > > Thanks > Rick > > > The following changes since commit 0c5c3f293554614416a188d16a8c05e0a6c5bfbb: > > arm: -march=armv5t for ARM11 (2019-12-09 10:36:00 -0500) > > are available in the Git repository at: > > g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git > > for you to fetch changes up to 0e1233ce9069a87a84a4385de456665d2bc9229d: > > spl: opensbi: wait for ack from secondary harts before entering OpenSBI > (2019-12-10 08:23:10 +0800) >
Applied to u-boot/master, thanks! -- Tom
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