On 06/11/19 7:51 PM, Roger Quadros wrote:
> Hi,
>
> We need to follow the TRM sequence and settings to ensure
> that the DPLL & PHY operates correctly over the entire
> temperature range.
>
> Tested with SATA on dra7-evm.
>
> Since this is a bug fix, I will suggest to include it in current -rc.
Tom,
Can you pick this up for current rc?
Thanks and regards,
Lokesh
>
> cheers,
> -roger
>
> Roger Quadros (4):
> phy: ti-pipe3: Use TRM recommended settings for SATA DPLL
> phy: ti-pipe3: Introduce mode property in driver data
> phy: ti-pipe3: improve DPLL stability for SATA & USB
> phy: ti-pipe3: Fix SATA & USB PHY power up sequence
>
> drivers/phy/ti-pipe3-phy.c | 281 ++++++++++++++++++++++++++++++++-----
> 1 file changed, 249 insertions(+), 32 deletions(-)
>
