On Jul 14, 2010, at 10:14 AM, Kumar Gala wrote: > From: york <[email protected]> > > Enabled registered DIMMs using data from SPD. RDIMMs have registers > which need to be configured before using. The register configuration > words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software > should read those RCWs and put into DDR controller before initialization. > > Signed-off-by: York Sun <[email protected]> > --- > .../powerpc/cpu/mpc8xxx/ddr/common_timing_params.h | 3 + > arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 81 ++++++++------------ > arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c | 6 +- > .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 18 ++++- > arch/powerpc/include/asm/fsl_ddr_dimm_params.h | 3 + > include/ddr_spd.h | 14 ++++ > 6 files changed, 72 insertions(+), 53 deletions(-)
applied to 85xx - k _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
