On 1/13/20 1:50 PM, Patrice CHOTARD wrote:
> Hi Marek
Hi,
> Adding Christophe Roullier
>
>
> On 1/10/20 1:28 AM, Marek Vasut wrote:
>> Add missing 'eth-ck' clock to the ethernet node. These clock are used to
>> generate external clock signal for the PHY in case 'st,eth_ref_clk_sel'
>> is specified.
>>
>> Signed-off-by: Marek Vasut <ma...@denx.de>
>> Cc: Patrick Delaunay <patrick.delau...@st.com>
>> Cc: Patrice Chotard <patrice.chot...@st.com>
>> ---
>> arch/arm/dts/stm32mp157c.dtsi | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi
>> index 6c670cf9a3..41aea75213 100644
>> --- a/arch/arm/dts/stm32mp157c.dtsi
>> +++ b/arch/arm/dts/stm32mp157c.dtsi
>> @@ -1404,11 +1404,13 @@
>> clock-names = "stmmaceth",
>> "mac-clk-tx",
>> "mac-clk-rx",
>> + "eth-ck",
>> "ethstp",
>> "syscfg-clk";
>> clocks = <&rcc ETHMAC>,
>> <&rcc ETHTX>,
>> <&rcc ETHRX>,
>> + <&rcc ETHCK_K>,
>> <&rcc ETHSTP>,
>> <&rcc SYSCFG>;
>> st,syscon = <&syscfg 0x4>;
>
> Adding this clock is a particular case, it should be added in the board DT
> file, not in the SoC DT one.
>
> Our ethernet expert ( Christophe -in CC) is surprised that you don't need
> the following pin:
>
> <STM32_PINMUX('G', 8, AF2)>, /* ETH_RMII_ETHCK */
>
> To confirm, can you describe your ethernet config ?
I need 50 MHz RMII clock output for PHY on PA1, PG8 is completely unused.
