On Fri, Jan 17, 2020 at 6:17 PM Pragnesh Patel <pragnesh.pa...@sifive.com> wrote: > > Added FU540 place-holder so that SoC specific values > will be kept here. > > Signed-off-by: Pragnesh Patel <pragnesh.pa...@sifive.com> > --- > arch/riscv/include/asm/arch-fu540/clk.h | 14 ++++++++++++++ > board/sifive/fu540/Kconfig | 3 +++ > 2 files changed, 17 insertions(+) > create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h > > diff --git a/arch/riscv/include/asm/arch-fu540/clk.h > b/arch/riscv/include/asm/arch-fu540/clk.h > new file mode 100644 > index 0000000000..b39f5b55c9 > --- /dev/null > +++ b/arch/riscv/include/asm/arch-fu540/clk.h > @@ -0,0 +1,14 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + * Copyright (c) 2019 SiFive, Inc. > + * > + * Authors: > + * Pragnesh Patel <pragnesh.pa...@sifive.com> > + */ > + > +#ifndef _CLK_FU540_H > +#define _CLK_FU540_H > + > +/* Note: This is a placeholder header for driver compilation. */ > + > +#endif > diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig > index 5ca21474de..816a135b21 100644 > --- a/board/sifive/fu540/Kconfig > +++ b/board/sifive/fu540/Kconfig > @@ -12,6 +12,9 @@ config SYS_CPU > config SYS_CONFIG_NAME > default "sifive-fu540" > > +config SYS_SOC > + default "fu540" > + > config SYS_TEXT_BASE > default 0x80000000 if !RISCV_SMODE > default 0x80200000 if RISCV_SMODE > -- > 2.17.1 >
LGTM. Reviewed-by: Anup Patel <anup.pa...@wdc.com> Regards, Anup