Hi Joel, On Tue, Jan 21, 2020 at 10:32:19AM -0700, Joel Johnson wrote: > The mPCIe slots on ClearFog Pro and ClearFog Base may be alternately > configured for SATA usage. > > Signed-off-by: Joel Johnson <[email protected]> > > --- > > v2 changes: > - fixed help indentation > v3 changes: > - none > > --- > board/solidrun/clearfog/Kconfig | 17 +++++++++++++++++ > board/solidrun/clearfog/clearfog.c | 6 ++++++ > 2 files changed, 23 insertions(+) > > diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig > index 936d5918f8..4e189b13e0 100644 > --- a/board/solidrun/clearfog/Kconfig > +++ b/board/solidrun/clearfog/Kconfig > @@ -15,4 +15,21 @@ config TARGET_CLEARFOG_BASE > detection via additional EEPROM hardware. This option enables > selecting > the Base variant for older hardware revisions. > > +config CLEARFOG_CON3_SATA > + bool "Use CON3 slot in SATA mode" > + help > + Use the CON3 port with SATA protocol instead of the default PCIe. > + The ClearFog port allows usage of either mSATA or miniPCIe > + modules, but the desired protocol must be configured at build > + time since it affects the SerDes topology layout. > + > +config CLEARFOG_CON2_SATA > + bool "Use CON2 slot in SATA mode" > + depends on !TARGET_CLEARFOG_BASE > + help > + Use the CON2 port with SATA protocol instead of the default PCIe. > + The ClearFog port allows usage of either mSATA or miniPCIe > + modules, but the desired protocol must be configured at build > + time since it affects the SerDes topology layout. > + > endmenu > diff --git a/board/solidrun/clearfog/clearfog.c > b/board/solidrun/clearfog/clearfog.c > index 086912e400..7046665d6c 100644 > --- a/board/solidrun/clearfog/clearfog.c > +++ b/board/solidrun/clearfog/clearfog.c > @@ -45,10 +45,16 @@ static void cf_read_tlv_data(void) > static struct serdes_map board_serdes_map[] = { > {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, > {SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, > +#if defined (CONFIG_CLEARFOG_CON3_SATA) > + {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
Have you tested mSATA with this patch? My testing showed that swap_rx must be set for mSATA. See this pull request: https://github.com/SolidRun/u-boot/pull/3 To make #ifdef less annoying I would prefer something like this instead (build tested only): diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index e268ef55a2a0..5bbb7906b681 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -29,6 +29,12 @@ DECLARE_GLOBAL_DATA_PTR; #define BOARD_GPP_POL_LOW 0x0 #define BOARD_GPP_POL_MID 0x0 +#if defined (CONFIG_CLEARFOG_CON3_SATA) +#define SERDES2_CONFIG {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 0} +#else +#define SERDES2_CONFIG {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0} +#endif + static struct tlv_data cf_tlv_data; static void cf_read_tlv_data(void) @@ -45,7 +51,7 @@ static void cf_read_tlv_data(void) static struct serdes_map board_serdes_map[] = { {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, {SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, + SERDES2_CONFIG, {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, baruch > +#else > {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, > +#endif > {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, > #if defined (CONFIG_TARGET_CLEARFOG_BASE) > {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, > +#elif defined(CONFIG_CLEARFOG_CON2_SATA) > + {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, > #else > {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, > #endif -- http://baruch.siach.name/blog/ ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - [email protected] - tel: +972.2.679.5364, http://www.tkos.co.il -
