The comment /* deassert reset */ is wrong. It asserts the reset.
It no longer needs to stay in SPL. The NAND controller reset is
handled in the driver. So, this assert can be moved to the
board_init() of U-Boot proper.
Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
---
arch/arm/mach-uniphier/board_init.c | 1 +
arch/arm/mach-uniphier/clk/Makefile | 2 +-
arch/arm/mach-uniphier/clk/clk-early-ld4.c | 7 -------
3 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index 99727a3004..ad3427b37b 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -40,6 +40,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
.soc_id = UNIPHIER_LD4_ID,
.sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
+ .clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
diff --git a/arch/arm/mach-uniphier/clk/Makefile
b/arch/arm/mach-uniphier/clk/Makefile
index c49e44754c..62fb86f86b 100644
--- a/arch/arm/mach-uniphier/clk/Makefile
+++ b/arch/arm/mach-uniphier/clk/Makefile
@@ -11,7 +11,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o
clk-dram-pxs2.o dpll-pxs2.o
else
-obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pll-ld4.o dpll-tail.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o
dpll-tail.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o pll-pro4.o dpll-tail.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pll-ld4.o dpll-tail.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o
diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c
b/arch/arm/mach-uniphier/clk/clk-early-ld4.c
index f32f78dd26..0f9ce65097 100644
--- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c
@@ -15,13 +15,6 @@ void uniphier_ld4_early_clk_init(void)
{
u32 tmp;
- /* deassert reset */
- if (spl_boot_device() != BOOT_DEVICE_NAND) {
- tmp = readl(sc_base + SC_RSTCTRL);
- tmp &= ~SC_RSTCTRL_NRST_NAND;
- writel(tmp, sc_base + SC_RSTCTRL);
- };
-
/* provide clocks */
tmp = readl(sc_base + SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
--
2.17.1
