[PATCH 2/3] arm: dts: add pwm support for MediaTek SoCs

[Sam Shih]

This patch add pwm support for mt7622, mt7623 and mt7629 SoCs

Signed-off-by: Sam Shih <sam.s...@mediatek.com>
---
 arch/arm/dts/mt7622.dtsi | 19 +++++++++++++++++++
 arch/arm/dts/mt7623.dtsi | 17 +++++++++++++++++
 arch/arm/dts/mt7629.dtsi | 16 ++++++++++++++++
 3 files changed, 52 insertions(+)

diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi
index 1e8ec9b48b..f9ce0c6c3e 100644
--- a/arch/arm/dts/mt7622.dtsi
+++ b/arch/arm/dts/mt7622.dtsi
@@ -227,4 +227,23 @@
                #clock-cells = <1>;
        };
 
+       pwm: pwm@11006000 {
+               compatible = "mediatek,mt7622-pwm";
+               reg = <0x11006000 0x1000>;
+               #clock-cells = <1>;
+               #pwm-cells = <2>;
+               interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&topckgen CLK_TOP_PWM_SEL>,
+                        <&pericfg CLK_PERI_PWM_PD>,
+                        <&pericfg CLK_PERI_PWM1_PD>,
+                        <&pericfg CLK_PERI_PWM2_PD>,
+                        <&pericfg CLK_PERI_PWM3_PD>,
+                        <&pericfg CLK_PERI_PWM4_PD>,
+                        <&pericfg CLK_PERI_PWM5_PD>,
+                        <&pericfg CLK_PERI_PWM6_PD>;
+               clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
+                             "pwm5", "pwm6";
+               status = "disabled";
+       };
+
 };
diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi
index 1f45dea575..0452889ef8 100644
--- a/arch/arm/dts/mt7623.dtsi
+++ b/arch/arm/dts/mt7623.dtsi
@@ -400,4 +400,21 @@
                mediatek,ethsys = <&ethsys>;
                status = "disabled";
        };
+
+       pwm: pwm@11006000 {
+               compatible = "mediatek,mt7623-pwm";
+               reg = <0x11006000 0x1000>;
+               #clock-cells = <1>;
+               #pwm-cells = <2>;
+               clocks = <&topckgen CLK_TOP_PWM_SEL>,
+                        <&pericfg CLK_PERI_PWM>,
+                        <&pericfg CLK_PERI_PWM1>,
+                        <&pericfg CLK_PERI_PWM2>,
+                        <&pericfg CLK_PERI_PWM3>,
+                        <&pericfg CLK_PERI_PWM4>,
+                        <&pericfg CLK_PERI_PWM5>;
+               clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
+                             "pwm5";
+               status = "disabled";
+       };
 };
diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi
index a33a74a556..644d2da4a8 100644
--- a/arch/arm/dts/mt7629.dtsi
+++ b/arch/arm/dts/mt7629.dtsi
@@ -281,4 +281,20 @@
                reg = <0x1b130000 0x1000>;
                #clock-cells = <1>;
        };
+
+       pwm: pwm@11006000 {
+               compatible = "mediatek,mt7629-pwm";
+               reg = <0x11006000 0x1000>;
+               #clock-cells = <1>;
+               #pwm-cells = <2>;
+               interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&topckgen CLK_TOP_PWM_SEL>,
+                        <&pericfg CLK_PERI_PWM_PD>,
+                        <&pericfg CLK_PERI_PWM1_PD>;
+               clock-names = "top", "main", "pwm1";
+               assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>;
+               assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>;
+               status = "disabled";
+       };
+
 };
-- 
2.17.1